| Message ID | 20190624133449.7641-1-ilya@yadro.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [v2] Allow to create slot for downstream port of any switch | expand |
| Context | Check | Description |
|---|---|---|
| snowpatch_ozlabs/apply_patch | success | Successfully applied on branch master (b904cb733750de1bb0e04e5012c391a9c3094d11) |
| snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot | fail | Test snowpatch/job/snowpatch-skiboot on branch master |
| snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco | success | Signed-off-by present |
On Mon, Jun 24, 2019 at 11:38 PM Ilya Kuznetsov <ilya@yadro.com> wrote: > > System vendor may build systems with large PCIe tree with > deeper switch topologies. Currenlty downstream ports slot > creation is limited to first switch. Patch allows to use any. > > Signed-off-by: Ilya Kuznetsov <ilya@yadro.com> Thanks, sorry this took so long. It's been a bit of a crapshoot with the change of maintainers. merged to master as dab352eecb1dac78112c67d322655e0eae0a16ba
diff --git a/core/pcie-slot.c b/core/pcie-slot.c index e7013d1e..dc5e4dcb 100644 --- a/core/pcie-slot.c +++ b/core/pcie-slot.c @@ -544,13 +544,8 @@ struct pci_slot *pcie_slot_create_dynamic(struct phb *phb, if (!phb || !pd || pd->slot) return NULL; - /* Try to create slot whose details aren't provided by platform. - * We only care the downstream ports of PCIe switch that connects - * to root port. - */ - if (pd->dev_type != PCIE_TYPE_SWITCH_DNPORT || - !pd->parent || !pd->parent->parent || - pd->parent->parent->parent) + /* Try to create slot whose details aren't provided by platform. */ + if (pd->dev_type != PCIE_TYPE_SWITCH_DNPORT) return NULL; ecap = pci_cap(pd, PCI_CFG_CAP_ID_EXP, false);
System vendor may build systems with large PCIe tree with deeper switch topologies. Currenlty downstream ports slot creation is limited to first switch. Patch allows to use any. Signed-off-by: Ilya Kuznetsov <ilya@yadro.com> --- core/pcie-slot.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-)