===================================================================
@@ -6664,16 +6664,20 @@ expand_vec_cond_expr (tree vec_cond_type
comparison = vector_compare_rtx (op0, unsignedp, icode);
rtx_op1 = expand_normal (op1);
+ rtx_op1 = simplify_gen_subreg (GET_MODE (comparison), rtx_op1,
+ GET_MODE (rtx_op1), 0);
rtx_op2 = expand_normal (op2);
+ rtx_op2 = simplify_gen_subreg (GET_MODE (comparison), rtx_op2,
+ GET_MODE (rtx_op2), 0);
- create_output_operand (&ops[0], target, mode);
- create_input_operand (&ops[1], rtx_op1, mode);
- create_input_operand (&ops[2], rtx_op2, mode);
+ create_output_operand (&ops[0], target, GET_MODE (comparison));
+ create_input_operand (&ops[1], rtx_op1, GET_MODE (comparison));
+ create_input_operand (&ops[2], rtx_op2, GET_MODE (comparison));
create_fixed_operand (&ops[3], comparison);
create_fixed_operand (&ops[4], XEXP (comparison, 0));
create_fixed_operand (&ops[5], XEXP (comparison, 1));
expand_insn (icode, 6, ops);
- return ops[0].value;
+ return simplify_gen_subreg (mode, ops[0].value, GET_MODE (comparison), 0);
}