| Message ID | 20190613161225.2531-3-thierry.reding@gmail.com |
|---|---|
| State | Deferred |
| Headers | show |
| Series | [1/3] clk: tegra: Do not warn unnecessarily | expand |
On 13/06/2019 17:12, Thierry Reding wrote: > From: Thierry Reding <treding@nvidia.com> > > It turns out that this PLL is not used on Tegra210, so there's no need > to enable it via the init table. Remove the init table entry for this > PLL to avoid it getting enabled at boot time. If the bootloader enabled > it and forgot to turn it off, the common clock framework will now know > to disable it because it is unused. > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > drivers/clk/tegra/clk-tegra210.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c > index 793c7acaf4e2..13537e4458b5 100644 > --- a/drivers/clk/tegra/clk-tegra210.c > +++ b/drivers/clk/tegra/clk-tegra210.c > @@ -3337,7 +3337,6 @@ static struct tegra_clk_init_table init_table[] __initdata = { > { TEGRA210_CLK_DFLL_SOC, TEGRA210_CLK_PLL_P, 51000000, 1 }, > { TEGRA210_CLK_DFLL_REF, TEGRA210_CLK_PLL_P, 51000000, 1 }, > { TEGRA210_CLK_SBC4, TEGRA210_CLK_PLL_P, 12000000, 1 }, > - { TEGRA210_CLK_PLL_RE_VCO, TEGRA210_CLK_CLK_MAX, 672000000, 1 }, > { TEGRA210_CLK_XUSB_GATE, TEGRA210_CLK_CLK_MAX, 0, 1 }, > { TEGRA210_CLK_XUSB_SS_SRC, TEGRA210_CLK_PLL_U_480M, 120000000, 0 }, > { TEGRA210_CLK_XUSB_FS_SRC, TEGRA210_CLK_PLL_U_48M, 48000000, 0 }, Acked-by: Jon Hunter <jonathanh@nvidia.com> Cheers Jon
Quoting Thierry Reding (2019-06-13 09:12:25) > From: Thierry Reding <treding@nvidia.com> > > It turns out that this PLL is not used on Tegra210, so there's no need > to enable it via the init table. Remove the init table entry for this > PLL to avoid it getting enabled at boot time. If the bootloader enabled > it and forgot to turn it off, the common clock framework will now know > to disable it because it is unused. > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- Applied to clk-next
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c index 793c7acaf4e2..13537e4458b5 100644 --- a/drivers/clk/tegra/clk-tegra210.c +++ b/drivers/clk/tegra/clk-tegra210.c @@ -3337,7 +3337,6 @@ static struct tegra_clk_init_table init_table[] __initdata = { { TEGRA210_CLK_DFLL_SOC, TEGRA210_CLK_PLL_P, 51000000, 1 }, { TEGRA210_CLK_DFLL_REF, TEGRA210_CLK_PLL_P, 51000000, 1 }, { TEGRA210_CLK_SBC4, TEGRA210_CLK_PLL_P, 12000000, 1 }, - { TEGRA210_CLK_PLL_RE_VCO, TEGRA210_CLK_CLK_MAX, 672000000, 1 }, { TEGRA210_CLK_XUSB_GATE, TEGRA210_CLK_CLK_MAX, 0, 1 }, { TEGRA210_CLK_XUSB_SS_SRC, TEGRA210_CLK_PLL_U_480M, 120000000, 0 }, { TEGRA210_CLK_XUSB_FS_SRC, TEGRA210_CLK_PLL_U_48M, 48000000, 0 },