[1/2] dt-bindings: i2c: Add MediaTek i2c AC timing binding
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Message ID 1560240715-22595-2-git-send-email-qii.wang@mediatek.com
State Changes Requested
Headers show
Series
  • Add support for AC timing adjustment
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Commit Message

Qii Wang June 11, 2019, 8:11 a.m. UTC
Add i2c AC timing binding to binding file. It can give the AC
timing parameters to meet I2C specification at different speed.

Signed-off-by: Qii Wang <qii.wang@mediatek.com>
---
 .../devicetree/bindings/i2c/i2c-mt65xx.txt         |   11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Wolfram Sang June 26, 2019, 1:39 p.m. UTC | #1
Hi,

On Tue, Jun 11, 2019 at 04:11:54PM +0800, Qii Wang wrote:
> Add i2c AC timing binding to binding file. It can give the AC
> timing parameters to meet I2C specification at different speed.
> 
> Signed-off-by: Qii Wang <qii.wang@mediatek.com>

I think this is a too specific 1:1 mapping of your register set into DT
world. We already have these generic parameters:

- clock-frequency
        frequency of bus clock in Hz.

- i2c-scl-falling-time-ns
        Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
        specification.

- i2c-scl-internal-delay-ns
        Number of nanoseconds the IP core additionally needs to setup SCL.

- i2c-scl-rising-time-ns
        Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
        specification.

- i2c-sda-falling-time-ns
        Number of nanoseconds the SDA signal takes to fall; t(f) in the I2C
        specification.

(check Documentation/devicetree/bindings/i2c/i2c.txt)

Can't you use those to derive your values from that? Which ones are you missing
if not?

Regards,

   Wolfram
Qii Wang July 17, 2019, 12:55 p.m. UTC | #2
On Wed, 2019-06-26 at 15:39 +0200, Wolfram Sang wrote:
> Hi,
> 
> On Tue, Jun 11, 2019 at 04:11:54PM +0800, Qii Wang wrote:
> > Add i2c AC timing binding to binding file. It can give the AC
> > timing parameters to meet I2C specification at different speed.
> > 
> > Signed-off-by: Qii Wang <qii.wang@mediatek.com>
> 
> I think this is a too specific 1:1 mapping of your register set into DT
> world. We already have these generic parameters:
> 
> - clock-frequency
>         frequency of bus clock in Hz.
> 
> - i2c-scl-falling-time-ns
>         Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
>         specification.
> 
> - i2c-scl-internal-delay-ns
>         Number of nanoseconds the IP core additionally needs to setup SCL.
> 
> - i2c-scl-rising-time-ns
>         Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
>         specification.
> 
> - i2c-sda-falling-time-ns
>         Number of nanoseconds the SDA signal takes to fall; t(f) in the I2C
>         specification.
> 
> (check Documentation/devicetree/bindings/i2c/i2c.txt)
> 
> Can't you use those to derive your values from that? Which ones are you missing
> if not?
> 
> Regards,
> 
>    Wolfram

I have take a little time to develop a new patch which based on your
suggestions, and it tested OK. Thanks for your suggestions, I will
update the patch after I test it fully.
Wolfram Sang July 17, 2019, 1:29 p.m. UTC | #3
> > Can't you use those to derive your values from that? Which ones are you missing
> > if not?
> 
> I have take a little time to develop a new patch which based on your
> suggestions, and it tested OK. Thanks for your suggestions, I will
> update the patch after I test it fully.

Great news, thanks!

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
index 68f6d73..0f92813 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mt65xx.txt
@@ -30,6 +30,7 @@  Optional properties:
   - mediatek,have-pmic: platform can control i2c form special pmic side.
     Only mt6589 and mt8135 support this feature.
   - mediatek,use-push-pull: IO config use push-pull mode.
+  - ac-timing: give some AC timing parameters to meet i2c spec fully.
 
 Example:
 
@@ -43,5 +44,15 @@  Example:
 			clock-div = <16>;
 			clocks = <&i2c0_ck>, <&ap_dma_ck>;
 			clock-names = "main", "dma";
+			ac-timing =  /bits/ 16 <
+				0x8001	/* 0:ext */
+				0x0005	/* 1:inter_clk_div */
+				0x0102	/* 2:scl_hl_ratio */
+				0x0102	/* 3:hs_scl_hl_ratio */
+				0x0002	/* 4:scl_mis_comp */
+				0x0002	/* 5:sta_stop */
+				0x0002	/* 6:hs_sta_stop */
+				0x0002	/* 7:sda_timing */
+			>;
 	};