diff mbox series

[06/12] rs6000: VSa->wa for some more cases

Message ID 4a98d652008e6356bb2fafb7993e4d84372c2a06.1559685816.git.segher@kernel.crashing.org
State New
Headers show
Series rs6000: Another batch of constraint simplification | expand

Commit Message

Segher Boessenkool June 4, 2019, 11:20 p.m. UTC 
2019-06-04  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/vsx.md (vsx_<VS_spdp_insn>): Use wa instead of <VSa>.
	(vsx_extract_<mode>_var): Ditto.

---
 gcc/config/rs6000/vsx.md | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 6255823..519f1a0 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -2164,8 +2164,8 @@  (define_insn "vsx_ceil<mode>2"
 ;; scalar single precision instructions internally use the double format.
 ;; Prefer the altivec registers, since we likely will need to do a vperm
 (define_insn "vsx_<VS_spdp_insn>"
-  [(set (match_operand:<VS_spdp_res> 0 "vsx_register_operand" "=<VSr4>,?<VSa>")
-	(unspec:<VS_spdp_res> [(match_operand:VSX_SPDP 1 "vsx_register_operand" "<VSr5>,<VSa>")]
+  [(set (match_operand:<VS_spdp_res> 0 "vsx_register_operand" "=<VSr4>,?wa")
+	(unspec:<VS_spdp_res> [(match_operand:VSX_SPDP 1 "vsx_register_operand" "<VSr5>,wa")]
 			      UNSPEC_VSX_CVSPDP))]
   "VECTOR_UNIT_VSX_P (<MODE>mode)"
   "<VS_spdp_insn> %x0,%x1"
@@ -3269,7 +3269,7 @@  (define_insn "vsx_vslo_<mode>"
 
 ;; Variable V2DI/V2DF extract
 (define_insn_and_split "vsx_extract_<mode>_var"
-  [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=v,<VSa>,r")
+  [(set (match_operand:<VS_scalar> 0 "gpc_reg_operand" "=v,wa,r")
 	(unspec:<VS_scalar> [(match_operand:VSX_D 1 "input_operand" "v,m,m")
 			     (match_operand:DI 2 "gpc_reg_operand" "r,r,r")]
 			    UNSPEC_VSX_EXTRACT))