| Message ID | 4E5279D7.3000908@siemens.com |
|---|---|
| State | New |
| Headers | show |
On 08/22/2011 10:46 AM, Jan Kiszka wrote: > Polarity of external interrupts needs to be handled in the IOAPIC. > Passing it to the APIC is pointless. So remove all these arguments. > > Signed-off-by: Jan Kiszka<jan.kiszka@siemens.com> Applied all. Thanks. Regards, Anthony Liguori > --- > hw/apic.c | 22 +++++++++------------- > hw/apic.h | 6 ++---- > hw/ioapic.c | 4 +--- > trace-events | 2 +- > 4 files changed, 13 insertions(+), 21 deletions(-) > > diff --git a/hw/apic.c b/hw/apic.c > index 9febf40..a21a816 100644 > --- a/hw/apic.c > +++ b/hw/apic.c > @@ -222,8 +222,7 @@ void apic_deliver_pic_intr(DeviceState *d, int level) > } > > static void apic_bus_deliver(const uint32_t *deliver_bitmask, > - uint8_t delivery_mode, > - uint8_t vector_num, uint8_t polarity, > + uint8_t delivery_mode, uint8_t vector_num, > uint8_t trigger_mode) > { > APICState *apic_iter; > @@ -280,18 +279,16 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask, > apic_set_irq(apic_iter, vector_num, trigger_mode) ); > } > > -void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, > - uint8_t delivery_mode, uint8_t vector_num, > - uint8_t polarity, uint8_t trigger_mode) > +void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, > + uint8_t vector_num, uint8_t trigger_mode) > { > uint32_t deliver_bitmask[MAX_APIC_WORDS]; > > trace_apic_deliver_irq(dest, dest_mode, delivery_mode, vector_num, > - polarity, trigger_mode); > + trigger_mode); > > apic_get_delivery_bitmask(deliver_bitmask, dest, dest_mode); > - apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, polarity, > - trigger_mode); > + apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); > } > > void cpu_set_apic_base(DeviceState *d, uint64_t val) > @@ -548,7 +545,7 @@ void apic_sipi(DeviceState *d) > > static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, > uint8_t delivery_mode, uint8_t vector_num, > - uint8_t polarity, uint8_t trigger_mode) > + uint8_t trigger_mode) > { > APICState *s = DO_UPCAST(APICState, busdev.qdev, d); > uint32_t deliver_bitmask[MAX_APIC_WORDS]; > @@ -591,8 +588,7 @@ static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, > return; > } > > - apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, polarity, > - trigger_mode); > + apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); > } > > int apic_get_interrupt(DeviceState *d) > @@ -794,7 +790,7 @@ static void apic_send_msi(target_phys_addr_t addr, uint32_t data) > uint8_t trigger_mode = (data>> MSI_DATA_TRIGGER_SHIFT)& 0x1; > uint8_t delivery = (data>> MSI_DATA_DELIVERY_MODE_SHIFT)& 0x7; > /* XXX: Ignore redirection hint. */ > - apic_deliver_irq(dest, dest_mode, delivery, vector, 0, trigger_mode); > + apic_deliver_irq(dest, dest_mode, delivery, vector, trigger_mode); > } > > static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) > @@ -855,7 +851,7 @@ static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) > s->icr[0] = val; > apic_deliver(d, (s->icr[1]>> 24)& 0xff, (s->icr[0]>> 11)& 1, > (s->icr[0]>> 8)& 7, (s->icr[0]& 0xff), > - (s->icr[0]>> 14)& 1, (s->icr[0]>> 15)& 1); > + (s->icr[0]>> 15)& 1); > break; > case 0x31: > s->icr[1] = val; > diff --git a/hw/apic.h b/hw/apic.h > index 8a0c9d0..a5c910f 100644 > --- a/hw/apic.h > +++ b/hw/apic.h > @@ -4,10 +4,8 @@ > #include "qemu-common.h" > > /* apic.c */ > -void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, > - uint8_t delivery_mode, > - uint8_t vector_num, uint8_t polarity, > - uint8_t trigger_mode); > +void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, > + uint8_t vector_num, uint8_t trigger_mode); > int apic_accept_pic_intr(DeviceState *s); > void apic_deliver_pic_intr(DeviceState *s, int level); > int apic_get_interrupt(DeviceState *s); > diff --git a/hw/ioapic.c b/hw/ioapic.c > index 6c26e82..5916387 100644 > --- a/hw/ioapic.c > +++ b/hw/ioapic.c > @@ -104,7 +104,6 @@ static void ioapic_service(IOAPICState *s) > uint64_t entry; > uint8_t dest; > uint8_t dest_mode; > - uint8_t polarity; > > for (i = 0; i< IOAPIC_NUM_PINS; i++) { > mask = 1<< i; > @@ -116,7 +115,6 @@ static void ioapic_service(IOAPICState *s) > dest_mode = (entry>> IOAPIC_LVT_DEST_MODE_SHIFT)& 1; > delivery_mode = > (entry>> IOAPIC_LVT_DELIV_MODE_SHIFT)& IOAPIC_DM_MASK; > - polarity = (entry>> IOAPIC_LVT_POLARITY_SHIFT)& 1; > if (trig_mode == IOAPIC_TRIGGER_EDGE) { > s->irr&= ~mask; > } else { > @@ -128,7 +126,7 @@ static void ioapic_service(IOAPICState *s) > vector = entry& IOAPIC_VECTOR_MASK; > } > apic_deliver_irq(dest, dest_mode, delivery_mode, > - vector, polarity, trig_mode); > + vector, trig_mode); > } > } > } > diff --git a/trace-events b/trace-events > index 14e6f8b..dc300a2 100644 > --- a/trace-events > +++ b/trace-events > @@ -90,7 +90,7 @@ disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" > > # hw/apic.c > disable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" > -disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d polarity %d trigger_mode %d" > +disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" > disable cpu_set_apic_base(uint64_t val) "%016"PRIx64"" > disable cpu_get_apic_base(uint64_t val) "%016"PRIx64"" > disable apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
diff --git a/hw/apic.c b/hw/apic.c index 9febf40..a21a816 100644 --- a/hw/apic.c +++ b/hw/apic.c @@ -222,8 +222,7 @@ void apic_deliver_pic_intr(DeviceState *d, int level) } static void apic_bus_deliver(const uint32_t *deliver_bitmask, - uint8_t delivery_mode, - uint8_t vector_num, uint8_t polarity, + uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) { APICState *apic_iter; @@ -280,18 +279,16 @@ static void apic_bus_deliver(const uint32_t *deliver_bitmask, apic_set_irq(apic_iter, vector_num, trigger_mode) ); } -void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, - uint8_t delivery_mode, uint8_t vector_num, - uint8_t polarity, uint8_t trigger_mode) +void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, + uint8_t vector_num, uint8_t trigger_mode) { uint32_t deliver_bitmask[MAX_APIC_WORDS]; trace_apic_deliver_irq(dest, dest_mode, delivery_mode, vector_num, - polarity, trigger_mode); + trigger_mode); apic_get_delivery_bitmask(deliver_bitmask, dest, dest_mode); - apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, polarity, - trigger_mode); + apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); } void cpu_set_apic_base(DeviceState *d, uint64_t val) @@ -548,7 +545,7 @@ void apic_sipi(DeviceState *d) static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, - uint8_t polarity, uint8_t trigger_mode) + uint8_t trigger_mode) { APICState *s = DO_UPCAST(APICState, busdev.qdev, d); uint32_t deliver_bitmask[MAX_APIC_WORDS]; @@ -591,8 +588,7 @@ static void apic_deliver(DeviceState *d, uint8_t dest, uint8_t dest_mode, return; } - apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, polarity, - trigger_mode); + apic_bus_deliver(deliver_bitmask, delivery_mode, vector_num, trigger_mode); } int apic_get_interrupt(DeviceState *d) @@ -794,7 +790,7 @@ static void apic_send_msi(target_phys_addr_t addr, uint32_t data) uint8_t trigger_mode = (data >> MSI_DATA_TRIGGER_SHIFT) & 0x1; uint8_t delivery = (data >> MSI_DATA_DELIVERY_MODE_SHIFT) & 0x7; /* XXX: Ignore redirection hint. */ - apic_deliver_irq(dest, dest_mode, delivery, vector, 0, trigger_mode); + apic_deliver_irq(dest, dest_mode, delivery, vector, trigger_mode); } static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -855,7 +851,7 @@ static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val) s->icr[0] = val; apic_deliver(d, (s->icr[1] >> 24) & 0xff, (s->icr[0] >> 11) & 1, (s->icr[0] >> 8) & 7, (s->icr[0] & 0xff), - (s->icr[0] >> 14) & 1, (s->icr[0] >> 15) & 1); + (s->icr[0] >> 15) & 1); break; case 0x31: s->icr[1] = val; diff --git a/hw/apic.h b/hw/apic.h index 8a0c9d0..a5c910f 100644 --- a/hw/apic.h +++ b/hw/apic.h @@ -4,10 +4,8 @@ #include "qemu-common.h" /* apic.c */ -void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, - uint8_t delivery_mode, - uint8_t vector_num, uint8_t polarity, - uint8_t trigger_mode); +void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, + uint8_t vector_num, uint8_t trigger_mode); int apic_accept_pic_intr(DeviceState *s); void apic_deliver_pic_intr(DeviceState *s, int level); int apic_get_interrupt(DeviceState *s); diff --git a/hw/ioapic.c b/hw/ioapic.c index 6c26e82..5916387 100644 --- a/hw/ioapic.c +++ b/hw/ioapic.c @@ -104,7 +104,6 @@ static void ioapic_service(IOAPICState *s) uint64_t entry; uint8_t dest; uint8_t dest_mode; - uint8_t polarity; for (i = 0; i < IOAPIC_NUM_PINS; i++) { mask = 1 << i; @@ -116,7 +115,6 @@ static void ioapic_service(IOAPICState *s) dest_mode = (entry >> IOAPIC_LVT_DEST_MODE_SHIFT) & 1; delivery_mode = (entry >> IOAPIC_LVT_DELIV_MODE_SHIFT) & IOAPIC_DM_MASK; - polarity = (entry >> IOAPIC_LVT_POLARITY_SHIFT) & 1; if (trig_mode == IOAPIC_TRIGGER_EDGE) { s->irr &= ~mask; } else { @@ -128,7 +126,7 @@ static void ioapic_service(IOAPICState *s) vector = entry & IOAPIC_VECTOR_MASK; } apic_deliver_irq(dest, dest_mode, delivery_mode, - vector, polarity, trig_mode); + vector, trig_mode); } } } diff --git a/trace-events b/trace-events index 14e6f8b..dc300a2 100644 --- a/trace-events +++ b/trace-events @@ -90,7 +90,7 @@ disable balloon_event(void *opaque, unsigned long addr) "opaque %p addr %lu" # hw/apic.c disable apic_local_deliver(int vector, uint32_t lvt) "vector %d delivery mode %d" -disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t polarity, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d polarity %d trigger_mode %d" +disable apic_deliver_irq(uint8_t dest, uint8_t dest_mode, uint8_t delivery_mode, uint8_t vector_num, uint8_t trigger_mode) "dest %d dest_mode %d delivery_mode %d vector %d trigger_mode %d" disable cpu_set_apic_base(uint64_t val) "%016"PRIx64"" disable cpu_get_apic_base(uint64_t val) "%016"PRIx64"" disable apic_mem_readl(uint64_t addr, uint32_t val) "%"PRIx64" = %08x"
Polarity of external interrupts needs to be handled in the IOAPIC. Passing it to the APIC is pointless. So remove all these arguments. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> --- hw/apic.c | 22 +++++++++------------- hw/apic.h | 6 ++---- hw/ioapic.c | 4 +--- trace-events | 2 +- 4 files changed, 13 insertions(+), 21 deletions(-)