| Message ID | 2243eda5-2784-2330-396f-9a1e68ce155b@codesourcery.com |
|---|---|
| State | New |
| Headers | show |
| Series | [committed,amdgcn] Fix stack initialization bug | expand |
On 24/05/2019 12:12, Andrew Stubbs wrote: > This patch fixes a 64-bit arithmetic bug in which the wrong instruction > was used for the lo-part resulting in an incorrect calculation for the > hi-part (signed vs. unsigned add). This causes a Memory Access Fault > whenever the launcher happens to choose a problematic address for the > stack allocation. > > This problem never occurred on GCN3 because the launcher always chose > addresses in the 32-bit range. It seems to happen more frequently on > GCN5 devices since a recent ROCm update. Now backported to gcc-9-branch. Andrew
Fix 64-bit addition in prologue. 2019-05-24 Andrew Stubbs <ams@codesourcery.com> gcc/ * config/gcn/gcn.c (gcn_expand_prologue): Use gen_addsi3_scalar_carry for lo-part. diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c index 47630c6edb4..71f4b4ce35a 100644 --- a/gcc/config/gcn/gcn.c +++ b/gcc/config/gcn/gcn.c @@ -2824,9 +2824,9 @@ gcn_expand_prologue () emit_move_insn (fp_lo, gen_rtx_REG (SImode, 0)); emit_insn (gen_andsi3_scc (fp_hi, gen_rtx_REG (SImode, 1), gen_int_mode (0xffff, SImode))); - emit_insn (gen_addsi3_scc (fp_lo, fp_lo, wave_offset)); - emit_insn (gen_addcsi3_scalar_zero (fp_hi, fp_hi, - gen_rtx_REG (BImode, SCC_REG))); + rtx scc = gen_rtx_REG (BImode, SCC_REG); + emit_insn (gen_addsi3_scalar_carry (fp_lo, fp_lo, wave_offset, scc)); + emit_insn (gen_addcsi3_scalar_zero (fp_hi, fp_hi, scc)); if (sp_adjust > 0) emit_insn (gen_adddi3_scc (sp, fp, gen_int_mode (sp_adjust, DImode)));