diff mbox series

[U-Boot,1/3] pci: intel: Increase TLP polling counter

Message ID 1558665000-3037-2-git-send-email-ley.foon.tan@intel.com
State Accepted
Commit d0e52c6f29efa9b728ed6e7f705d4e92a8ff9d2d
Delegated to: Tom Rini
Headers show
Series Intel FPGA PCIe fixes | expand

Commit Message

Ley Foon Tan May 24, 2019, 2:29 a.m. UTC 
Some PCIe devices require longer time to response.
Increase polling counter to 20000 (~100ms).

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
---
 drivers/pci/pcie_intel_fpga.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Tom Rini Aug. 13, 2019, 4:52 p.m. UTC | #1 
On Fri, May 24, 2019 at 10:29:58AM +0800, Ley Foon Tan wrote:

> Some PCIe devices require longer time to response.
> Increase polling counter to 20000 (~100ms).
> 
> Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>

Applied to u-boot/master, thanks!
diff mbox series

Patch

diff --git a/drivers/pci/pcie_intel_fpga.c b/drivers/pci/pcie_intel_fpga.c
index 3cdf05b314..e74b35ac16 100644
--- a/drivers/pci/pcie_intel_fpga.c
+++ b/drivers/pci/pcie_intel_fpga.c
@@ -56,7 +56,7 @@ 
 #define TLP_COMP_STATUS(s)		(((s) >> 13) & 7)
 #define TLP_BYTE_COUNT(s)		(((s) >> 0) & 0xfff)
 #define TLP_HDR_SIZE			3
-#define TLP_LOOP			500
+#define TLP_LOOP			20000
 #define DWORD_MASK			3
 
 #define IS_ROOT_PORT(pcie, bdf)				\