@@ -387,6 +387,26 @@ static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
return 1;
}
}
+#elif defined(TARGET_M68K)
+static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
+ flag aIsLargerSignificand)
+{
+ /* If either operand, but not both operands, of an operation is a
+ * nonsignaling NAN, then that NAN is returned as the result. If both
+ * operands are nonsignaling NANs, then the destination operand
+ * nonsignaling NAN is returned as the result.
+ */
+
+ if (aIsSNaN) {
+ return 0;
+ } else if (bIsSNaN) {
+ return 1;
+ } else if (bIsQNaN) {
+ return 1;
+ } else {
+ return 0;
+ }
+}
#else
static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
flag aIsLargerSignificand)
@@ -244,6 +244,8 @@ static int cpu_m68k_set_model(CPUM68KState *env, const char *name)
void cpu_reset(CPUM68KState *env)
{
+ int i;
+
if (qemu_loglevel_mask(CPU_LOG_RESET)) {
qemu_log("CPU Reset (CPU %d)\n", env->cpu_index);
log_cpu_state(env, 0);
@@ -254,7 +256,16 @@ void cpu_reset(CPUM68KState *env)
env->sr = 0x2700;
#endif
m68k_switch_sp(env);
- /* ??? FP regs should be initialized to NaN. */
+
+ for (i = 0; i < 8; i++) {
+ env->fregs[i].l.upper = floatx80_default_nan_high;
+ env->fregs[i].l.lower = 0xffffffffffffffffULL;
+ }
+ env->fp0h = floatx80_default_nan_high;
+ env->fp0l = 0xffffffffffffffffULL;
+ env->fp1h = floatx80_default_nan_high;
+ env->fp1l = 0xffffffffffffffffULL;
+
env->cc_op = CC_OP_FLAGS;
/* TODO: We should set PC from the interrupt vector. */
env->pc = 0;