From patchwork Wed Aug 17 14:17:32 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: nagabhushana.netagunte@ti.com X-Patchwork-Id: 110327 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0490CB6EE8 for ; Thu, 18 Aug 2011 00:17:48 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 629632807C; Wed, 17 Aug 2011 16:17:44 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IXeLtnFw-1vI; Wed, 17 Aug 2011 16:17:44 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 407572807E; Wed, 17 Aug 2011 16:17:42 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 338E52807E for ; Wed, 17 Aug 2011 16:17:40 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DXLos7X2IboZ for ; Wed, 17 Aug 2011 16:17:39 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from devils.ext.ti.com (devils.ext.ti.com [198.47.26.153]) by theia.denx.de (Postfix) with ESMTPS id 35C772807C for ; Wed, 17 Aug 2011 16:17:38 +0200 (CEST) Received: from dbdp20.itg.ti.com ([172.24.170.38]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id p7HEHXpi005747 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 17 Aug 2011 09:17:36 -0500 Received: from dbde70.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id p7HEHX6b018745 for ; Wed, 17 Aug 2011 19:47:33 +0530 (IST) Received: from dbdp31.itg.ti.com (172.24.170.98) by DBDE70.ent.ti.com (172.24.170.148) with Microsoft SMTP Server id 8.3.106.1; Wed, 17 Aug 2011 19:47:33 +0530 Received: from psplinux051.india.ti.com (psplinux051.india.ti.com [172.24.162.244]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id p7HEHWgA008955; Wed, 17 Aug 2011 19:47:32 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id p7HEHW3i002451; Wed, 17 Aug 2011 19:47:32 +0530 Received: (from x0144960@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id p7HEHW2J002448; Wed, 17 Aug 2011 19:47:32 +0530 From: To: Date: Wed, 17 Aug 2011 19:47:32 +0530 Message-ID: <1313590652-2419-1-git-send-email-nagabhushana.netagunte@ti.com> X-Mailer: git-send-email 1.6.2.4 MIME-Version: 1.0 Cc: Nagabhushana Netagunte , sudhakar.raj@ti.com, manjunath.hadli@ti.com Subject: [U-Boot] [PATCH] dm365: disable cache usage due to coherency issues X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Nagabhushana Netagunte there are cache coherency issues when using the DAVINCI Ethernet driver, hence caches cant be used for d365 u-boot. As per new cache management framework,if the caches are not used in u-boot, it needs to be explicitly indicated through macros in config file. CACHE disable is indicated by the following macro definitions in config file, 1. CONFIG_SYS_ICACHE_OFF 2. CONFIG_SYS_DCACHE_OFF 3. CONFIG_SYS_L2CACHE_OFF Signed-off-by: Nagabhushana Netagunte --- include/configs/davinci_dm365evm.h | 3 +++ 1 files changed, 3 insertions(+), 0 deletions(-) diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h index 2825050..172a852 100644 --- a/include/configs/davinci_dm365evm.h +++ b/include/configs/davinci_dm365evm.h @@ -33,6 +33,9 @@ #define CONFIG_SYS_HZ_CLOCK 24000000 /* timer0 freq */ #define CONFIG_SYS_HZ 1000 #define CONFIG_SOC_DM365 +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_L2CACHE_OFF /* Memory Info */ #define CONFIG_NR_DRAM_BANKS 1