diff mbox series

[V3,RESEND,1/4] dt-bindings: fsl: scu: add ocotp binding

Message ID 20190522020040.30283-1-peng.fan@nxp.com
State Not Applicable, archived
Headers show
Series [V3,RESEND,1/4] dt-bindings: fsl: scu: add ocotp binding | expand

Commit Message

Peng Fan May 22, 2019, 1:46 a.m. UTC 
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller(SCU), the ocotp controller is being controlled
by the SCU, so Linux need use RPC to SCU for ocotp handling. This
patch adds binding doc for i.MX8 SCU OCOTP driver.

Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Anson Huang <anson.huang@nxp.com>
Cc: devicetree@vger.kernel.org
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---

V3:
 Add R-b tag
V2:
 Move OCOTP to end, add example, add "scu"

 .../devicetree/bindings/arm/freescale/fsl,scu.txt  | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

Comments

Srinivas Kandagatla May 23, 2019, 8:47 a.m. UTC | #1 
On 22/05/2019 02:46, Peng Fan wrote:
> This patch adds i.MX8 nvmem ocotp driver to access fuse via
> RPC to i.MX8 system controller.
> 
> Cc: Srinivas Kandagatla<srinivas.kandagatla@linaro.org>
> Cc: Shawn Guo<shawnguo@kernel.org>
> Cc: Sascha Hauer<s.hauer@pengutronix.de>
> Cc: Pengutronix Kernel Team<kernel@pengutronix.de>
> Cc: Fabio Estevam<festevam@gmail.com>
> Cc: NXP Linux Team<linux-imx@nxp.com>
> Cc:linux-arm-kernel@lists.infradead.org
> Signed-off-by: Peng Fan<peng.fan@nxp.com>
> ---
> 
> V3:
>   Use imx_sc_msg_misc_fuse_read for req/resp
>   Drop uneccessary check
>   Drop the unnecessary type conversion
>   Minor fixes according to v2 comments
> 
> V2:
>   Add "scu" or "SCU", Add imx_sc_misc_otp_fuse_read, minor fixes
> 
>   drivers/nvmem/Kconfig         |   7 ++
>   drivers/nvmem/Makefile        |   2 +
>   drivers/nvmem/imx-ocotp-scu.c | 161 ++++++++++++++++++++++++++++++++++++++++++
>   3 files changed, 170 insertions(+)
>   create mode 100644 drivers/nvmem/imx-ocotp-scu.c

Applied 1/4 and 2/4 patches.
defconfig and dts changes should go via arm-soc tree.

Thanks,
srini
Shawn Guo May 23, 2019, 12:52 p.m. UTC | #2 
On Wed, May 22, 2019 at 01:47:05AM +0000, Peng Fan wrote:
> Build in CONFIG_NVMEM_IMX_OCOTP_SCU.
> 
> Cc: Catalin Marinas <catalin.marinas@arm.com>
> Cc: Will Deacon <will.deacon@arm.com>
> Cc: Shawn Guo <shawn.guo@linaro.org>
> Cc: Andy Gross <andy.gross@linaro.org>
> Cc: Maxime Ripard <maxime.ripard@bootlin.com>
> Cc: Olof Johansson <olof@lixom.net>
> Cc: Jagan Teki <jagan@amarulasolutions.com>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Leonard Crestez <leonard.crestez@nxp.com>
> Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
> Cc: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Please do not use base64 encoding for patch posting.

Shawn

> ---
> 
> V3:
>  No change
> V2:
>  rename patch title, add review tag
> 
>  arch/arm64/configs/defconfig | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 979a95c915b6..32b85102b857 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -748,6 +748,7 @@ CONFIG_HISI_PMU=y
>  CONFIG_QCOM_L2_PMU=y
>  CONFIG_QCOM_L3_PMU=y
>  CONFIG_NVMEM_IMX_OCOTP=y
> +CONFIG_NVMEM_IMX_OCOTP_SCU=y
>  CONFIG_QCOM_QFPROM=y
>  CONFIG_ROCKCHIP_EFUSE=y
>  CONFIG_UNIPHIER_EFUSE=y
> -- 
> 2.16.4
>
Peng Fan May 24, 2019, 6:48 a.m. UTC | #3 
Hi Shawn,

> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo@kernel.org]
> Sent: 2019年5月23日 20:53
> To: Peng Fan <peng.fan@nxp.com>
> Cc: srinivas.kandagatla@linaro.org; robh+dt@kernel.org;
> s.hauer@pengutronix.de; festevam@gmail.com; dl-linux-imx
> <linux-imx@nxp.com>; linux-kernel@vger.kernel.org;
> linux-arm-kernel@lists.infradead.org; devicetree@vger.kernel.org;
> van.freenix@gmail.com; Catalin Marinas <catalin.marinas@arm.com>; Will
> Deacon <will.deacon@arm.com>; Shawn Guo <shawn.guo@linaro.org>; Andy
> Gross <andy.gross@linaro.org>; Maxime Ripard
> <maxime.ripard@bootlin.com>; Olof Johansson <olof@lixom.net>; Jagan Teki
> <jagan@amarulasolutions.com>; Bjorn Andersson
> <bjorn.andersson@linaro.org>; Leonard Crestez <leonard.crestez@nxp.com>;
> Marc Gonzalez <marc.w.gonzalez@free.fr>; Enric Balletbo i Serra
> <enric.balletbo@collabora.com>
> Subject: Re: [PATCH V3 RESEND 3/4] defconfig: arm64: enable i.MX8 SCU
> octop driver
> 
> On Wed, May 22, 2019 at 01:47:05AM +0000, Peng Fan wrote:
> > Build in CONFIG_NVMEM_IMX_OCOTP_SCU.
> >
> > Cc: Catalin Marinas <catalin.marinas@arm.com>
> > Cc: Will Deacon <will.deacon@arm.com>
> > Cc: Shawn Guo <shawn.guo@linaro.org>
> > Cc: Andy Gross <andy.gross@linaro.org>
> > Cc: Maxime Ripard <maxime.ripard@bootlin.com>
> > Cc: Olof Johansson <olof@lixom.net>
> > Cc: Jagan Teki <jagan@amarulasolutions.com>
> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> > Cc: Leonard Crestez <leonard.crestez@nxp.com>
> > Cc: Marc Gonzalez <marc.w.gonzalez@free.fr>
> > Cc: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> > Cc: linux-arm-kernel@lists.infradead.org
> > Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> 
> Please do not use base64 encoding for patch posting.

Since Srinivas picked up patch 1/4 and 2/4, so just resend the
patch 3/4 and patch 4/4.

https://patchwork.kernel.org/patch/10959149/
https://patchwork.kernel.org/patch/10959151/

Thanks,
Peng.
> 
> Shawn
> 
> > ---
> >
> > V3:
> >  No change
> > V2:
> >  rename patch title, add review tag
> >
> >  arch/arm64/configs/defconfig | 1 +
> >  1 file changed, 1 insertion(+)
> >
> > diff --git a/arch/arm64/configs/defconfig
> > b/arch/arm64/configs/defconfig index 979a95c915b6..32b85102b857
> 100644
> > --- a/arch/arm64/configs/defconfig
> > +++ b/arch/arm64/configs/defconfig
> > @@ -748,6 +748,7 @@ CONFIG_HISI_PMU=y
> >  CONFIG_QCOM_L2_PMU=y
> >  CONFIG_QCOM_L3_PMU=y
> >  CONFIG_NVMEM_IMX_OCOTP=y
> > +CONFIG_NVMEM_IMX_OCOTP_SCU=y
> >  CONFIG_QCOM_QFPROM=y
> >  CONFIG_ROCKCHIP_EFUSE=y
> >  CONFIG_UNIPHIER_EFUSE=y
> > --
> > 2.16.4
> >
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
index 5d7dbabbb784..f378922906f6 100644
--- a/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
+++ b/Documentation/devicetree/bindings/arm/freescale/fsl,scu.txt
@@ -133,6 +133,18 @@  RTC bindings based on SCU Message Protocol
 Required properties:
 - compatible: should be "fsl,imx8qxp-sc-rtc";
 
+OCOTP bindings based on SCU Message Protocol
+------------------------------------------------------------
+Required properties:
+- compatible:		Should be "fsl,imx8qxp-scu-ocotp"
+- #address-cells:	Must be 1. Contains byte index
+- #size-cells:		Must be 1. Contains byte length
+
+Optional Child nodes:
+
+- Data cells of ocotp:
+  Detailed bindings are described in bindings/nvmem/nvmem.txt
+
 Example (imx8qxp):
 -------------
 aliases {
@@ -177,6 +189,16 @@  firmware {
 			...
 		};
 
+		ocotp: imx8qx-ocotp {
+			compatible = "fsl,imx8qxp-scu-ocotp";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			fec_mac0: mac@2c4 {
+				reg = <0x2c4 8>;
+			};
+		};
+
 		pd: imx8qx-pd {
 			compatible = "fsl,imx8qxp-scu-pd", "fsl,scu-pd";
 			#power-domain-cells = <1>;