| Message ID | 20190517123846.3708-7-vidyas@nvidia.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add Tegra194 PCIe support | expand |
On Fri, May 17, 2019 at 06:08:37PM +0530, Vidya Sagar wrote: > Add support to enable CDM (Configuration Dependent Module) registers check > for any data corruption. CDM registers include standard PCIe configuration > space registers, Port Logic registers and iATU and DMA registers. > Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook > Version 4.90a > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > Changes since [v6]: > * Changed "enable-cdm-check" to "snps,enable-cdm-check" > > Changes since [v5]: > * None > > Changes since [v4]: > * None > > Changes since [v3]: > * None > > Changes since [v2]: > * Changed flag name from 'cdm-check' to 'enable-cdm-check' > * Added info about Port Logic and DMA registers being part of CDM > > Changes since [v1]: > * This is a new patch in v2 series > > Documentation/devicetree/bindings/pci/designware-pcie.txt | 5 +++++ > 1 file changed, 5 insertions(+) Reviewed-by: Thierry Reding <treding@nvidia.com>
On Fri, 17 May 2019 18:08:37 +0530, Vidya Sagar wrote: > Add support to enable CDM (Configuration Dependent Module) registers check > for any data corruption. CDM registers include standard PCIe configuration > space registers, Port Logic registers and iATU and DMA registers. > Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook > Version 4.90a > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > Changes since [v6]: > * Changed "enable-cdm-check" to "snps,enable-cdm-check" > > Changes since [v5]: > * None > > Changes since [v4]: > * None > > Changes since [v3]: > * None > > Changes since [v2]: > * Changed flag name from 'cdm-check' to 'enable-cdm-check' > * Added info about Port Logic and DMA registers being part of CDM > > Changes since [v1]: > * This is a new patch in v2 series > > Documentation/devicetree/bindings/pci/designware-pcie.txt | 5 +++++ > 1 file changed, 5 insertions(+) > Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt index 5561a1c060d0..3fba04da6a59 100644 --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt @@ -34,6 +34,11 @@ Optional properties: - clock-names: Must include the following entries: - "pcie" - "pcie_bus" +- snps,enable-cdm-check: This is a boolean property and if present enables + automatic checking of CDM (Configuration Dependent Module) registers + for data corruption. CDM registers include standard PCIe configuration + space registers, Port Logic registers, DMA and iATU (internal Address + Translation Unit) registers. RC mode: - num-viewport: number of view ports configured in hardware. If a platform does not specify it, the driver assumes 2.
Add support to enable CDM (Configuration Dependent Module) registers check for any data corruption. CDM registers include standard PCIe configuration space registers, Port Logic registers and iATU and DMA registers. Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook Version 4.90a Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- Changes since [v6]: * Changed "enable-cdm-check" to "snps,enable-cdm-check" Changes since [v5]: * None Changes since [v4]: * None Changes since [v3]: * None Changes since [v2]: * Changed flag name from 'cdm-check' to 'enable-cdm-check' * Added info about Port Logic and DMA registers being part of CDM Changes since [v1]: * This is a new patch in v2 series Documentation/devicetree/bindings/pci/designware-pcie.txt | 5 +++++ 1 file changed, 5 insertions(+)