From patchwork Thu May 16 03:19:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1100269 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="QjvjfkWd"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 454GxP0Qzfz9sDn for ; Thu, 16 May 2019 13:24:24 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 89312C21E47; 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Thu, 16 May 2019 03:19:26 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1878.024; Thu, 16 May 2019 03:19:26 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" Thread-Topic: [PATCH 15/15] i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXT Thread-Index: AQHVC5YqgAjaYNfr5UmcS3WmXkD91Q== Date: Thu, 16 May 2019 03:19:26 +0000 Message-ID: <20190516033236.10594-15-peng.fan@nxp.com> References: <20190516033236.10594-1-peng.fan@nxp.com> In-Reply-To: <20190516033236.10594-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK2PR0401CA0008.apcprd04.prod.outlook.com (2603:1096:202:2::18) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; x-ms-exchange-messagesentrepresentingtype: 1 x-originating-ip: [119.31.174.71] x-ms-publictraffictype: Email x-ms-office365-filtering-correlation-id: 0950a6fb-d236-4549-f432-08d6d9ad4ccf x-ms-office365-filtering-ht: Tenant x-microsoft-antispam: BCL:0; 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H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: isyvhHfMcVQcviErB6xkFfxYbn46oH9/5iwLEx1dDzSfKodyOP2OGwgCzzTVEG/evP9vS67caYcoOvuB+i2dox/dNSZpYfxzctrXZOLeJRSDiiieZSy21x3jEUSQlUydvsyO7qkvpLCIBfAxKZolKtNpTKhxryo9l2MbAixXMfc+zKeeI4clSdEEAXTv9r0s1SnD2yqLv5kZScM/Gns+2Uv6xRVpZ5KT60JyEwgE9b5fYXhz0a0v1PTN0ZBKwnoNgiu4bffubqe86lR0sZW9HAPhWd1yu/nsT8OjlJCgvG3kTw/SjT5DU+BTjb6H1UfNhqGivt3p0ytv5R+ztydjTw2JBInrolvKRDwkks3c9sNFkKF7SsY/qvtYwW0RGhiO6kHkZ4KrfdGs2w46PzgUmatJTAuekDSoBKEWSPgf1vE= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0950a6fb-d236-4549-f432-08d6d9ad4ccf X-MS-Exchange-CrossTenant-originalarrivaltime: 16 May 2019 03:19:26.3358 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB6594 Cc: "u-boot@lists.denx.de" , dl-uboot-imx Subject: [U-Boot] [PATCH 15/15] i.MX7ULP: Change clock rate calculation for NIC1 BUS and EXT X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Ye Li On i.MX7ULP B0, there is change in NIC clock dividers architecture. On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but on B0 they are parallel with NIC1 DIV. So now the dividers are independent. This patch modifies the scg_nic_get_rate function according to this change. Signed-off-by: Ye Li Acked-by: Peng Fan --- arch/arm/mach-imx/mx7ulp/scg.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mx7ulp/scg.c b/arch/arm/mach-imx/mx7ulp/scg.c index 0d31352c77..819c90af6c 100644 --- a/arch/arm/mach-imx/mx7ulp/scg.c +++ b/arch/arm/mach-imx/mx7ulp/scg.c @@ -352,7 +352,7 @@ static u32 scg_ddr_get_rate(void) static u32 scg_nic_get_rate(enum scg_clk clk) { - u32 reg, val, rate; + u32 reg, val, rate, nic0_rate; u32 shift, mask; reg = readl(&scg1_regs->niccsr); @@ -370,6 +370,7 @@ static u32 scg_nic_get_rate(enum scg_clk clk) val = (reg & SCG_NICCSR_NIC0DIV_MASK) >> SCG_NICCSR_NIC0DIV_SHIFT; rate = rate / (val + 1); + nic0_rate = rate; clk_debug("scg_nic_get_rate NIC0 rate %u\n", rate); @@ -411,6 +412,13 @@ static u32 scg_nic_get_rate(enum scg_clk clk) return 0; } + /* + * On RevB, the nic_bus and nic_ext dividers are parallel + * not chained with nic div + */ + if (soc_rev() >= CHIP_REV_2_0) + rate = nic0_rate; + val = (reg & mask) >> shift; rate = rate / (val + 1);