@@ -46,11 +46,11 @@ DATA 4 0x403e0040 0x01000020
DATA 4 0x403e0500 0x01000000
DATA 4 0x403e050c 0x80808080
DATA 4 0x403e0508 0x00160002
-DATA 4 0x403E0510 0x00000002
-DATA 4 0x403E0514 0x00000005
+DATA 4 0x403E0510 0x00000001
+DATA 4 0x403E0514 0x00000014
DATA 4 0x403e0500 0x00000001
CHECK_BITS_SET 4 0x403e0500 0x01000000
-DATA 4 0x403e050c 0x80808020
+DATA 4 0x403e050c 0x8080801B
CHECK_BITS_SET 4 0x403e050c 0x00000040
DATA 4 0x403E0030 0x00000001
DATA 4 0x403e0040 0x11000020
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Copyright 2019 NXP
*/
#include <config.h>
@@ -20,9 +21,9 @@
str r3, [r2, #0x50c]
ldr r3, =0x00160002
str r3, [r2, #0x508]
- ldr r3, =0x00000002
+ ldr r3, =0x00000001
str r3, [r2, #0x510]
- ldr r3, =0x00000005
+ ldr r3, =0x00000014
str r3, [r2, #0x514]
ldr r3, =0x00000001
str r3, [r2, #0x500]
@@ -34,7 +35,7 @@ wait1:
cmp r4, r3
bne wait1
- ldr r3, =0x80808020
+ ldr r3, =0x8080801B
str r3, [r2, #0x50c]
ldr r3, =0x00000040