diff mbox

[U-Boot] mpc83xx: fix global timer structure definition

Message ID 20110814230939.dec19ead.kim.phillips@freescale.com
State Accepted
Commit 63063cc7ae690b418b1dae1cb21004587361369e
Delegated to: Kim Phillips
Headers show

Commit Message

Kim Phillips Aug. 15, 2011, 4:09 a.m. UTC
On Mon, 15 Aug 2011 02:20:18 +0000
shawn Bai <programassem@hotmail.com> wrote:

> In my opinion,the third member in struct gtm83xx if numbered from zero should be defined as u8 res1[11] not u8 res1[10].
> There shoudl be one more u8 space reserved according to the mpc837x reference manual.

yep.

> Or, should there be a macro to differentiate boards' configure ?

nope.

I've got this one.  Meanwhile, please read:

http://www.denx.de/wiki/U-Boot/Patches

for next time.

Thanks,

Kim

From a5331dd5fe6379c0165c82cc5fe444c0c8a88419 Mon Sep 17 00:00:00 2001
From: Kim Phillips <kim.phillips@freescale.com>
Date: Sun, 14 Aug 2011 22:53:08 -0500
Subject: [PATCH] mpc83xx: fix global timer structure definition

The byte address distance between GTCFR2 and GTMDR1 is 11, not 10.

Reported-by: Shawn Bai <programassem@hotmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
---
 arch/powerpc/include/asm/immap_83xx.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Comments

Joe Hershberger Aug. 15, 2011, 10:13 p.m. UTC | #1
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

On Sun, Aug 14, 2011 at 11:09 PM, Kim Phillips
<kim.phillips@freescale.com> wrote:
> On Mon, 15 Aug 2011 02:20:18 +0000
> shawn Bai <programassem@hotmail.com> wrote:
>
>> In my opinion,the third member in struct gtm83xx if numbered from zero should be defined as u8 res1[11] not u8 res1[10].
>> There shoudl be one more u8 space reserved according to the mpc837x reference manual.
>
> yep.
>
>> Or, should there be a macro to differentiate boards' configure ?
>
> nope.
>
> I've got this one.  Meanwhile, please read:
>
> http://www.denx.de/wiki/U-Boot/Patches
>
> for next time.
>
> Thanks,
>
> Kim
>
> From a5331dd5fe6379c0165c82cc5fe444c0c8a88419 Mon Sep 17 00:00:00 2001
> From: Kim Phillips <kim.phillips@freescale.com>
> Date: Sun, 14 Aug 2011 22:53:08 -0500
> Subject: [PATCH] mpc83xx: fix global timer structure definition
>
> The byte address distance between GTCFR2 and GTMDR1 is 11, not 10.
>
> Reported-by: Shawn Bai <programassem@hotmail.com>
> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
> ---
>  arch/powerpc/include/asm/immap_83xx.h |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h
> index cc0293a..f1bcd7b 100644
> --- a/arch/powerpc/include/asm/immap_83xx.h
> +++ b/arch/powerpc/include/asm/immap_83xx.h
> @@ -113,7 +113,7 @@ typedef struct gtm83xx {
>        u8 cfr1;                /* Timer1/2 Configuration */
>        u8 res0[3];
>        u8 cfr2;                /* Timer3/4 Configuration */
> -       u8 res1[10];
> +       u8 res1[11];
>        u16 mdr1;               /* Timer1 Mode Register */
>        u16 mdr2;               /* Timer2 Mode Register */
>        u16 rfr1;               /* Timer1 Reference Register */
> --
> 1.7.6
>
>
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
Kim Phillips Sept. 14, 2011, 1:09 a.m. UTC | #2
On Mon, 15 Aug 2011 17:13:39 -0500
Joe Hershberger <joe.hershberger@gmail.com> wrote:

> Acked-by: Joe Hershberger <joe.hershberger@ni.com>

please don't top-post.

> > The byte address distance between GTCFR2 and GTMDR1 is 11, not 10.
> >
> > Reported-by: Shawn Bai <programassem@hotmail.com>
> > Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
> > ---

applied, thanks.

Kim
diff mbox

Patch

diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h
index cc0293a..f1bcd7b 100644
--- a/arch/powerpc/include/asm/immap_83xx.h
+++ b/arch/powerpc/include/asm/immap_83xx.h
@@ -113,7 +113,7 @@  typedef struct gtm83xx {
 	u8 cfr1;		/* Timer1/2 Configuration */
 	u8 res0[3];
 	u8 cfr2;		/* Timer3/4 Configuration */
-	u8 res1[10];
+	u8 res1[11];
 	u16 mdr1;		/* Timer1 Mode Register */
 	u16 mdr2;		/* Timer2 Mode Register */
 	u16 rfr1;		/* Timer1 Reference Register */