Patchwork [ARM] Fix PR target/48328 part 1

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Submitter Ramana Radhakrishnan
Date Aug. 12, 2011, 1:59 p.m.
Message ID <CACUk7=WVQiZ3yzZMZGEkA7RPEhuktu+tG_JPb1gwmc11z_Tfig@mail.gmail.com>
Download mbox | patch
Permalink /patch/109841/
State New
Headers show

Comments

Ramana Radhakrishnan - Aug. 12, 2011, 1:59 p.m.
Hi,

The Thumb2 tbh instruction can take half word values that are
multiplied by 2 which implies the maximum offset is 0x1FFFF when you
add it to the pc ,
rather than 0xFFF which is what the current range check of 0x2000 for
HImode values indicates. Checked that a pre-compiled insn-recog.i that
I had lying around got about 5 more tbh's *and* assembled and
generally looks sane.

Tests running for T2 v7-a on qemu. Will commit after results come out.

cheers
Ramana

2011-08-12  Ramana Radhakrishnan  <ramana.radhakrishnan@linaro.org>

        PR target/48328
	* config/arm/arm.h (CASE_VECTOR_SHORTEN_MODE): Fix distance
	for tbh instructions.

       : QImode))

Patch

diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 869b9a9..0a6e6f2 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -1906,7 +1906,7 @@  typedef struct
       : min >= -4096 && max < 4096                                     \
       ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 0, HImode)       \
       : SImode)
         \
-   : ((min < 0 || max >= 0x2000 || !TARGET_THUMB2) ? SImode            \
+   : ((min < 0 || max >= 0x20000 || !TARGET_THUMB2) ? SImode           \
       : (max >= 0x200) ? HImode
         \