Patchwork [3/9] serial: Remove ioregister parameter from serial_mm_init.

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Submitter Richard Henderson
Date Aug. 11, 2011, 11:07 p.m.
Message ID <1313104041-1641-4-git-send-email-rth@twiddle.net>
Download mbox | patch
Permalink /patch/109732/
State New
Headers show

Comments

Richard Henderson - Aug. 11, 2011, 11:07 p.m.
All callers passed 1.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 hw/mips_jazz.c           |    4 ++--
 hw/mips_malta.c          |    2 +-
 hw/musicpal.c            |    4 ++--
 hw/omap_uart.c           |    4 ++--
 hw/pc.h                  |    3 +--
 hw/petalogix_ml605_mmu.c |    2 +-
 hw/ppc405_uc.c           |    8 ++++----
 hw/ppc440.c              |    4 ++--
 hw/ppce500_mpc8544ds.c   |    4 ++--
 hw/pxa2xx.c              |    4 ++--
 hw/serial.c              |    8 +++-----
 hw/sm501.c               |    2 +-
 hw/sun4u.c               |    2 +-
 hw/virtex_ml507.c        |    2 +-
 14 files changed, 25 insertions(+), 28 deletions(-)

Patch

diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 8287ca4..894d716 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -253,11 +253,11 @@  static void mips_jazz_init(MemoryRegion *address_space,
     /* Serial ports */
     if (serial_hds[0]) {
         serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0],
-                       1, DEVICE_NATIVE_ENDIAN);
+                       DEVICE_NATIVE_ENDIAN);
     }
     if (serial_hds[1]) {
         serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1],
-                       1, DEVICE_NATIVE_ENDIAN);
+                       DEVICE_NATIVE_ENDIAN);
     }
 
     /* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 2851f8c..6412b06 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -447,7 +447,7 @@  static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
     s->display = qemu_chr_open("fpga", "vc:320x200", malta_fpga_led_init);
 
     s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
-                             1, DEVICE_NATIVE_ENDIAN);
+                             DEVICE_NATIVE_ENDIAN);
 
     malta_fpga_reset(s);
     qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index d33e880..f0065ad 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1489,11 +1489,11 @@  static void musicpal_init(MemoryRegion *address_space_mem,
 
     if (serial_hds[0]) {
         serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
-                       serial_hds[0], 1, DEVICE_NATIVE_ENDIAN);
+                       serial_hds[0], DEVICE_NATIVE_ENDIAN);
     }
     if (serial_hds[1]) {
         serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
-                       serial_hds[1], 1, DEVICE_NATIVE_ENDIAN);
+                       serial_hds[1], DEVICE_NATIVE_ENDIAN);
     }
 
     /* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index 64b2085..f1d04c8 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -61,7 +61,7 @@  struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
     s->fclk = fclk;
     s->irq = irq;
     s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
-                               chr ?: qemu_chr_open(label, "null", NULL), 1,
+                               chr ?: qemu_chr_open(label, "null", NULL),
                                DEVICE_NATIVE_ENDIAN);
     return s;
 }
@@ -178,6 +178,6 @@  void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
     /* TODO: Should reuse or destroy current s->serial */
     s->serial = serial_mm_init(s->base, 2, s->irq,
                                omap_clk_getrate(s->fclk) / 16,
-                               chr ?: qemu_chr_open("null", "null", NULL), 1,
+                               chr ?: qemu_chr_open("null", "null", NULL),
                                DEVICE_NATIVE_ENDIAN);
 }
diff --git a/hw/pc.h b/hw/pc.h
index b7323fc..f81635f 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -17,8 +17,7 @@  SerialState *serial_init(int base, qemu_irq irq, int baudbase,
                          CharDriverState *chr);
 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
                              qemu_irq irq, int baudbase,
-                             CharDriverState *chr, int ioregister,
-                             enum device_endian);
+                             CharDriverState *chr, enum device_endian);
 static inline bool serial_isa_init(int index, CharDriverState *chr)
 {
     ISADevice *dev;
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index 2ae5c43..a82ee82 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -189,7 +189,7 @@  petalogix_ml605_init(MemoryRegion *address_space_mem,
     }
 
     serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], 115200,
-                   serial_hds[0], 1, DEVICE_LITTLE_ENDIAN);
+                   serial_hds[0], DEVICE_LITTLE_ENDIAN);
 
     /* 2 timers at irq 2 @ 100 Mhz.  */
     xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 1000000);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index fb36c07..2704839 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2150,11 +2150,11 @@  CPUState *ppc405cr_init (MemoryRegion ram_memories[4],
     /* Serial ports */
     if (serial_hds[0] != NULL) {
         serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
-                       serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+                       serial_hds[0], DEVICE_BIG_ENDIAN);
     }
     if (serial_hds[1] != NULL) {
         serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
-                       serial_hds[1], 1, DEVICE_BIG_ENDIAN);
+                       serial_hds[1], DEVICE_BIG_ENDIAN);
     }
     /* IIC controller */
     ppc405_i2c_init(0xef600500, pic[2]);
@@ -2505,11 +2505,11 @@  CPUState *ppc405ep_init (MemoryRegion ram_memories[2],
     /* Serial ports */
     if (serial_hds[0] != NULL) {
         serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
-                       serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+                       serial_hds[0], DEVICE_BIG_ENDIAN);
     }
     if (serial_hds[1] != NULL) {
         serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
-                       serial_hds[1], 1, DEVICE_BIG_ENDIAN);
+                       serial_hds[1], DEVICE_BIG_ENDIAN);
     }
     /* OCM */
     ppc405_ocm_init(env);
diff --git a/hw/ppc440.c b/hw/ppc440.c
index b5391d4..9439716 100644
--- a/hw/ppc440.c
+++ b/hw/ppc440.c
@@ -93,11 +93,11 @@  CPUState *ppc440ep_init(ram_addr_t *ram_size, PCIBus **pcip,
 
     if (serial_hds[0] != NULL) {
         serial_mm_init(0xef600300, 0, pic[0], PPC_SERIAL_MM_BAUDBASE,
-                       serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+                       serial_hds[0], DEVICE_BIG_ENDIAN);
     }
     if (serial_hds[1] != NULL) {
         serial_mm_init(0xef600400, 0, pic[1], PPC_SERIAL_MM_BAUDBASE,
-                       serial_hds[1], 1, DEVICE_BIG_ENDIAN);
+                       serial_hds[1], DEVICE_BIG_ENDIAN);
     }
 
     return env;
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index ae72612..588440f 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -278,13 +278,13 @@  static void mpc8544ds_init(MemoryRegion *address_space_mem,
     if (serial_hds[0]) {
         serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
                        0, mpic[12+26], 399193,
-                       serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+                       serial_hds[0], DEVICE_BIG_ENDIAN);
     }
 
     if (serial_hds[1]) {
         serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
                        0, mpic[12+26], 399193,
-                       serial_hds[0], 1, DEVICE_BIG_ENDIAN);
+                       serial_hds[0], DEVICE_BIG_ENDIAN);
     }
 
     /* General Utility device */
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index a30e714..f8d052e 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -2117,7 +2117,7 @@  PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
         if (serial_hds[i]) {
             serial_mm_init(pxa270_serial[i].io_base, 2,
                            qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
-                           14857000 / 16, serial_hds[i], 1,
+                           14857000 / 16, serial_hds[i],
                            DEVICE_NATIVE_ENDIAN);
         } else {
             break;
@@ -2249,7 +2249,7 @@  PXA2xxState *pxa255_init(unsigned int sdram_size)
         if (serial_hds[i]) {
             serial_mm_init(pxa255_serial[i].io_base, 2,
                            qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
-                           14745600 / 16, serial_hds[i], 1,
+                           14745600 / 16, serial_hds[i],
                            DEVICE_NATIVE_ENDIAN);
         } else {
             break;
diff --git a/hw/serial.c b/hw/serial.c
index 2954a48..9402a5c 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -857,8 +857,7 @@  static const MemoryRegionOps serial_mm_ops[3] = {
 
 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
                              qemu_irq irq, int baudbase,
-                             CharDriverState *chr, int ioregister,
-                             enum device_endian end)
+                             CharDriverState *chr, enum device_endian end)
 {
     SerialState *s;
 
@@ -874,9 +873,8 @@  SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
 
     memory_region_init_io(&s->io, &serial_mm_ops[end], s,
                           "serial", 8 << it_shift);
-    if (ioregister) {
-        memory_region_add_subregion(get_system_memory(), base, &s->io);
-    }
+    memory_region_add_subregion(get_system_memory(), base, &s->io);
+
     serial_update_msl(s);
     return s;
 }
diff --git a/hw/sm501.c b/hw/sm501.c
index de57186..de9a6d0 100644
--- a/hw/sm501.c
+++ b/hw/sm501.c
@@ -1442,7 +1442,7 @@  void sm501_init(uint32_t base, uint32_t local_mem_bytes, qemu_irq irq,
     if (chr) {
         serial_mm_init(base + MMIO_BASE_OFFSET + SM501_UART0, 2,
                        NULL, /* TODO : chain irq to IRL */
-                       115200, chr, 1, DEVICE_NATIVE_ENDIAN);
+                       115200, chr, DEVICE_NATIVE_ENDIAN);
     }
 
     /* create qemu graphic console */
diff --git a/hw/sun4u.c b/hw/sun4u.c
index d9096fc..c6948c1 100644
--- a/hw/sun4u.c
+++ b/hw/sun4u.c
@@ -768,7 +768,7 @@  static void sun4uv_init(ram_addr_t RAM_size,
     i = 0;
     if (hwdef->console_serial_base) {
         serial_mm_init(hwdef->console_serial_base, 0, NULL, 115200,
-                       serial_hds[i], 1, DEVICE_BIG_ENDIAN);
+                       serial_hds[i], DEVICE_BIG_ENDIAN);
         i++;
     }
     for(; i < MAX_SERIAL_PORTS; i++) {
diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c
index d9a2758..a211436 100644
--- a/hw/virtex_ml507.c
+++ b/hw/virtex_ml507.c
@@ -233,7 +233,7 @@  static void virtex_init(MemoryRegion *address_space_mem,
     }
 
     serial_mm_init(0x83e01003ULL, 2, irq[9], 115200, serial_hds[0],
-                   1, DEVICE_LITTLE_ENDIAN);
+                   DEVICE_LITTLE_ENDIAN);
 
     /* 2 timers at irq 2 @ 62 Mhz.  */
     xilinx_timer_create(0x83c00000, irq[3], 2, 62 * 1000000);