Patchwork [v11,3/6] flexcan: Fix up fsl-flexcan device tree binding.

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Submitter holt@sgi.com
Date Aug. 11, 2011, 4:07 p.m.
Message ID <1313078831-2511-4-git-send-email-holt@sgi.com>
Download mbox | patch
Permalink /patch/109644/
State Not Applicable
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Comments

holt@sgi.com - Aug. 11, 2011, 4:07 p.m.
This patch cleans up the documentation of the device-tree binding for
the Flexcan devices on Freescale's PowerPC and ARM cores. Extra
properties are not used by the driver so we are removing them.

Signed-off-by: Robin Holt <holt@sgi.com>
To: Marc Kleine-Budde <mkl@pengutronix.de>,
To: Wolfgang Grandegger <wg@grandegger.com>,
To: U Bhaskar-B22300 <B22300@freescale.com>
To: Scott Wood <scottwood@freescale.com>
To: Grant Likely <grant.likely@secretlab.ca>
To: Kumar Gala <galak@kernel.crashing.org>
Cc: socketcan-core@lists.berlios.de,
Cc: netdev@vger.kernel.org,
Cc: PPC list <linuxppc-dev@lists.ozlabs.org>
Cc: devicetree-discuss@lists.ozlabs.org
---
 .../devicetree/bindings/net/can/fsl-flexcan.txt    |   69 ++++---------------
 arch/powerpc/boot/dts/p1010rdb.dts                 |   10 +--
 arch/powerpc/boot/dts/p1010si.dtsi                 |   10 +--
 3 files changed, 21 insertions(+), 68 deletions(-)
Grant Likely - Aug. 11, 2011, 4:53 p.m.
On Thu, Aug 11, 2011 at 10:07 AM, Robin Holt <holt@sgi.com> wrote:
> This patch cleans up the documentation of the device-tree binding for
> the Flexcan devices on Freescale's PowerPC and ARM cores. Extra
> properties are not used by the driver so we are removing them.
>
> Signed-off-by: Robin Holt <holt@sgi.com>
> To: Marc Kleine-Budde <mkl@pengutronix.de>,
> To: Wolfgang Grandegger <wg@grandegger.com>,
> To: U Bhaskar-B22300 <B22300@freescale.com>
> To: Scott Wood <scottwood@freescale.com>
> To: Grant Likely <grant.likely@secretlab.ca>
> To: Kumar Gala <galak@kernel.crashing.org>
> Cc: socketcan-core@lists.berlios.de,
> Cc: netdev@vger.kernel.org,
> Cc: PPC list <linuxppc-dev@lists.ozlabs.org>
> Cc: devicetree-discuss@lists.ozlabs.org
> ---
>  .../devicetree/bindings/net/can/fsl-flexcan.txt    |   69 ++++---------------
>  arch/powerpc/boot/dts/p1010rdb.dts                 |   10 +--
>  arch/powerpc/boot/dts/p1010si.dtsi                 |   10 +--
>  3 files changed, 21 insertions(+), 68 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
> index 1a729f0..c78dcbb 100644
> --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
> +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
> @@ -1,61 +1,22 @@
> -CAN Device Tree Bindings
> -------------------------
> -2011 Freescale Semiconductor, Inc.
> +Flexcan CAN contoller on Freescale's ARM and PowerPC processors
>
> -fsl,flexcan-v1.0 nodes
> ------------------------
> -In addition to the required compatible-, reg- and interrupt-properties, you can
> -also specify which clock source shall be used for the controller.
> +Required properties:
>
> -CPI Clock- Can Protocol Interface Clock
> -       This CLK_SRC bit of CTRL(control register) selects the clock source to
> -       the CAN Protocol Interface(CPI) to be either the peripheral clock
> -       (driven by the PLL) or the crystal oscillator clock. The selected clock
> -       is the one fed to the prescaler to generate the Serial Clock (Sclock).
> -       The PRESDIV field of CTRL(control register) controls a prescaler that
> -       generates the Serial Clock (Sclock), whose period defines the
> -       time quantum used to compose the CAN waveform.
> +- compatible : Should be "fsl,<processor>-flexcan" and "fsl,flexcan"

Don't do this.  "fsl,flexcan" is far too generic.  Be specific to the
soc part number or the ip core implementation version.

>
> -Can Engine Clock Source
> -       There are two sources for CAN clock
> -       - Platform Clock  It represents the bus clock
> -       - Oscillator Clock
> +  An implementation should also claim any of the following compatibles
> +  that it is fully backwards compatible with:
>
> -       Peripheral Clock (PLL)
> -       --------------
> -                    |
> -                   ---------                 -------------
> -                   |       |CPI Clock        | Prescaler |       Sclock
> -                   |       |---------------->| (1.. 256) |------------>
> -                   ---------                 -------------
> -                     |  |
> -       --------------  ---------------------CLK_SRC
> -       Oscillator Clock
> +  - fsl,p1010-flexcan
>
> -- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects
> -                            the peripheral clock. PLL clock is fed to the
> -                            prescaler to generate the Serial Clock (Sclock).
> -                            Valid values are "oscillator" and "platform"
> -                            "oscillator": CAN engine clock source is oscillator clock.
> -                            "platform" The CAN engine clock source is the bus clock
> -                            (platform clock).
> +- reg : Offset and length of the register set for this device
> +- interrupts : Interrupt tuple for this device
>
> -- fsl,flexcan-clock-divider : for the reference and system clock, an additional
> -                             clock divider can be specified.
> -- clock-frequency: frequency required to calculate the bitrate for FlexCAN.
> +Example:
>
> -Note:
> -       - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC.
> -       - P1010 does not have oscillator as the Clock Source.So the default
> -         Clock Source is platform clock.
> -Examples:
> -
> -       can0@1c000 {
> -               compatible = "fsl,flexcan-v1.0";
> -               reg = <0x1c000 0x1000>;
> -               interrupts = <48 0x2>;
> -               interrupt-parent = <&mpic>;
> -               fsl,flexcan-clock-source = "platform";
> -               fsl,flexcan-clock-divider = <2>;
> -               clock-frequency = <fixed by u-boot>;
> -       };
> +  can@1c000 {
> +          compatible = "fsl,p1010-flexcan", "fsl,flexcan";
> +          reg = <0x1c000 0x1000>;
> +          interrupts = <48 0x2>;
> +          interrupt-parent = <&mpic>;
> +  };

The diffstat for this patch looks too big because the whitespace has
changed.  Try to restrict whitespace changes so that the patch is
friendly to reviewers.

g.
holt@sgi.com - Aug. 12, 2011, 8:28 a.m.
On Thu, Aug 11, 2011 at 10:53:43AM -0600, Grant Likely wrote:
> On Thu, Aug 11, 2011 at 10:07 AM, Robin Holt <holt@sgi.com> wrote:
> > +- compatible : Should be "fsl,<processor>-flexcan" and "fsl,flexcan"
> 
> Don't do this.  "fsl,flexcan" is far too generic.  Be specific to the
> soc part number or the ip core implementation version.

I don't have any crumbs to go with here.  There is nothing in the
documentation I have found to indicate what this is or should be.
I looked at the documentation for the P1010 processor and there is nothing
in there which I noticed that indicates what I could possibly use other
than flexcan.  They don't even indicate the registers are equivalent or
identical to their i.MX implementations for i.MX25 and i.MX35.  The only
thing they call it is flexcan.  I have asked our local freescale rep and
he said "There is no 'chip', it is just flexcan.  flexcan is flexcan."
His tone was such that I got the feeling he thought the question was
crazy as flexcan is flexcan.

> > -Can Engine Clock Source
> > -       There are two sources for CAN clock
> > -       - Platform Clock  It represents the bus clock
> > -       - Oscillator Clock
> > +  An implementation should also claim any of the following compatibles
> > +  that it is fully backwards compatible with:
> >
> > -       Peripheral Clock (PLL)
> > -       --------------
> > -                    |
> > -                   ---------                 -------------
> > -                   |       |CPI Clock        | Prescaler |       Sclock
> > -                   |       |---------------->| (1.. 256) |------------>
> > -                   ---------                 -------------
> > -                     |  |
> > -       --------------  ---------------------CLK_SRC
> > -       Oscillator Clock
> > +  - fsl,p1010-flexcan
> >
> > -- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects
> > -                            the peripheral clock. PLL clock is fed to the
> > -                            prescaler to generate the Serial Clock (Sclock).
> > -                            Valid values are "oscillator" and "platform"
> > -                            "oscillator": CAN engine clock source is oscillator clock.
> > -                            "platform" The CAN engine clock source is the bus clock
> > -                            (platform clock).
> > +- reg : Offset and length of the register set for this device
> > +- interrupts : Interrupt tuple for this device
> >
> > -- fsl,flexcan-clock-divider : for the reference and system clock, an additional
> > -                             clock divider can be specified.
> > -- clock-frequency: frequency required to calculate the bitrate for FlexCAN.
> > +Example:
> >
> > -Note:
> > -       - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC.
> > -       - P1010 does not have oscillator as the Clock Source.So the default
> > -         Clock Source is platform clock.
> > -Examples:
> > -
> > -       can0@1c000 {
> > -               compatible = "fsl,flexcan-v1.0";
> > -               reg = <0x1c000 0x1000>;
> > -               interrupts = <48 0x2>;
> > -               interrupt-parent = <&mpic>;
> > -               fsl,flexcan-clock-source = "platform";
> > -               fsl,flexcan-clock-divider = <2>;
> > -               clock-frequency = <fixed by u-boot>;
> > -       };
> > +  can@1c000 {
> > +          compatible = "fsl,p1010-flexcan", "fsl,flexcan";
> > +          reg = <0x1c000 0x1000>;
> > +          interrupts = <48 0x2>;
> > +          interrupt-parent = <&mpic>;
> > +  };
> 
> The diffstat for this patch looks too big because the whitespace has
> changed.  Try to restrict whitespace changes so that the patch is
> friendly to reviewers.

Reworked the best I can.  That reduced the diffstat by 3 lines.

Robin

Patch

diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
index 1a729f0..c78dcbb 100644
--- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
+++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt
@@ -1,61 +1,22 @@ 
-CAN Device Tree Bindings
-------------------------
-2011 Freescale Semiconductor, Inc.
+Flexcan CAN contoller on Freescale's ARM and PowerPC processors
 
-fsl,flexcan-v1.0 nodes
------------------------
-In addition to the required compatible-, reg- and interrupt-properties, you can
-also specify which clock source shall be used for the controller.
+Required properties:
 
-CPI Clock- Can Protocol Interface Clock
-	This CLK_SRC bit of CTRL(control register) selects the clock source to
-	the CAN Protocol Interface(CPI) to be either the peripheral clock
-	(driven by the PLL) or the crystal oscillator clock. The selected clock
-	is the one fed to the prescaler to generate the Serial Clock (Sclock).
-	The PRESDIV field of CTRL(control register) controls a prescaler that
-	generates the Serial Clock (Sclock), whose period defines the
-	time quantum used to compose the CAN waveform.
+- compatible : Should be "fsl,<processor>-flexcan" and "fsl,flexcan"
 
-Can Engine Clock Source
-	There are two sources for CAN clock
-	- Platform Clock  It represents the bus clock
-	- Oscillator Clock
+  An implementation should also claim any of the following compatibles
+  that it is fully backwards compatible with:
 
-	Peripheral Clock (PLL)
-	--------------
-		     |
-		    ---------		      -------------
-		    |       |CPI Clock	      | Prescaler |       Sclock
-		    |       |---------------->| (1.. 256) |------------>
-		    ---------		      -------------
-                     |  |
-	--------------  ---------------------CLK_SRC
-	Oscillator Clock
+  - fsl,p1010-flexcan
 
-- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects
-			     the peripheral clock. PLL clock is fed to the
-			     prescaler to generate the Serial Clock (Sclock).
-			     Valid values are "oscillator" and "platform"
-			     "oscillator": CAN engine clock source is oscillator clock.
-			     "platform" The CAN engine clock source is the bus clock
-		             (platform clock).
+- reg : Offset and length of the register set for this device
+- interrupts : Interrupt tuple for this device
 
-- fsl,flexcan-clock-divider : for the reference and system clock, an additional
-			      clock divider can be specified.
-- clock-frequency: frequency required to calculate the bitrate for FlexCAN.
+Example:
 
-Note:
-	- v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC.
-	- P1010 does not have oscillator as the Clock Source.So the default
-	  Clock Source is platform clock.
-Examples:
-
-	can0@1c000 {
-		compatible = "fsl,flexcan-v1.0";
-		reg = <0x1c000 0x1000>;
-		interrupts = <48 0x2>;
-		interrupt-parent = <&mpic>;
-		fsl,flexcan-clock-source = "platform";
-		fsl,flexcan-clock-divider = <2>;
-		clock-frequency = <fixed by u-boot>;
-	};
+  can@1c000 {
+          compatible = "fsl,p1010-flexcan", "fsl,flexcan";
+          reg = <0x1c000 0x1000>;
+          interrupts = <48 0x2>;
+          interrupt-parent = <&mpic>;
+  };
diff --git a/arch/powerpc/boot/dts/p1010rdb.dts b/arch/powerpc/boot/dts/p1010rdb.dts
index 6b33b73..d6c669c 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dts
+++ b/arch/powerpc/boot/dts/p1010rdb.dts
@@ -23,6 +23,8 @@ 
 		ethernet2 = &enet2;
 		pci0 = &pci0;
 		pci1 = &pci1;
+		can0 = &can0;
+		can1 = &can1;
 	};
 
 	memory {
@@ -169,14 +171,6 @@ 
 			};
 		};
 
-		can0@1c000 {
-			fsl,flexcan-clock-source = "platform";
-		};
-
-		can1@1d000 {
-			fsl,flexcan-clock-source = "platform";
-		};
-
 		usb@22000 {
 			phy_type = "utmi";
 		};
diff --git a/arch/powerpc/boot/dts/p1010si.dtsi b/arch/powerpc/boot/dts/p1010si.dtsi
index 7f51104..f00076b 100644
--- a/arch/powerpc/boot/dts/p1010si.dtsi
+++ b/arch/powerpc/boot/dts/p1010si.dtsi
@@ -140,20 +140,18 @@ 
 			interrupt-parent = <&mpic>;
 		};
 
-		can0@1c000 {
-			compatible = "fsl,flexcan-v1.0";
+		can0: can@1c000 {
+			compatible = "fsl,p1010-flexcan", "fsl,flexcan";
 			reg = <0x1c000 0x1000>;
 			interrupts = <48 0x2>;
 			interrupt-parent = <&mpic>;
-			fsl,flexcan-clock-divider = <2>;
 		};
 
-		can1@1d000 {
-			compatible = "fsl,flexcan-v1.0";
+		can1: can@1d000 {
+			compatible = "fsl,p1010-flexcan", "fsl,flexcan";
 			reg = <0x1d000 0x1000>;
 			interrupts = <61 0x2>;
 			interrupt-parent = <&mpic>;
-			fsl,flexcan-clock-divider = <2>;
 		};
 
 		L2: l2-cache-controller@20000 {