Message ID | 1312993670-23999-6-git-send-email-holt@sgi.com (mailing list archive) |
---|---|
State | Not Applicable |
Headers | show |
On 08/10/2011 11:27 AM, Robin Holt wrote: > -CPI Clock- Can Protocol Interface Clock > - This CLK_SRC bit of CTRL(control register) selects the clock source to > - the CAN Protocol Interface(CPI) to be either the peripheral clock > - (driven by the PLL) or the crystal oscillator clock. The selected clock > - is the one fed to the prescaler to generate the Serial Clock (Sclock). > - The PRESDIV field of CTRL(control register) controls a prescaler that > - generates the Serial Clock (Sclock), whose period defines the > - time quantum used to compose the CAN waveform. > +- compatible : Should be "fsl,flexcan" and optionally > + "fsl,flexcan-<processor>" fsl,<processor>-flexcan, and it should not be optional, and should come before "fsl,flexcan". Also may want to list fsl,p1010-rdb as a "canonical compatible" for anything which is backwards compatible with p1010's implementation. -Scott
On Wed, Aug 10, 2011 at 11:56:28AM -0500, Scott Wood wrote: > On 08/10/2011 11:27 AM, Robin Holt wrote: > > -CPI Clock- Can Protocol Interface Clock > > - This CLK_SRC bit of CTRL(control register) selects the clock source to > > - the CAN Protocol Interface(CPI) to be either the peripheral clock > > - (driven by the PLL) or the crystal oscillator clock. The selected clock > > - is the one fed to the prescaler to generate the Serial Clock (Sclock). > > - The PRESDIV field of CTRL(control register) controls a prescaler that > > - generates the Serial Clock (Sclock), whose period defines the > > - time quantum used to compose the CAN waveform. > > +- compatible : Should be "fsl,flexcan" and optionally > > + "fsl,flexcan-<processor>" > > fsl,<processor>-flexcan, and it should not be optional, and should come > before "fsl,flexcan". > > Also may want to list fsl,p1010-rdb as a "canonical compatible" for > anything which is backwards compatible with p1010's implementation. How do I specify 'canonical compatible'? What would be the use of it in that implementation? Robin
On 08/10/2011 12:19 PM, Robin Holt wrote: > On Wed, Aug 10, 2011 at 11:56:28AM -0500, Scott Wood wrote: >> On 08/10/2011 11:27 AM, Robin Holt wrote: >>> -CPI Clock- Can Protocol Interface Clock >>> - This CLK_SRC bit of CTRL(control register) selects the clock source to >>> - the CAN Protocol Interface(CPI) to be either the peripheral clock >>> - (driven by the PLL) or the crystal oscillator clock. The selected clock >>> - is the one fed to the prescaler to generate the Serial Clock (Sclock). >>> - The PRESDIV field of CTRL(control register) controls a prescaler that >>> - generates the Serial Clock (Sclock), whose period defines the >>> - time quantum used to compose the CAN waveform. >>> +- compatible : Should be "fsl,flexcan" and optionally >>> + "fsl,flexcan-<processor>" >> >> fsl,<processor>-flexcan, and it should not be optional, and should come >> before "fsl,flexcan". >> >> Also may want to list fsl,p1010-rdb as a "canonical compatible" for >> anything which is backwards compatible with p1010's implementation. > > How do I specify 'canonical compatible'? Something like: compatible: Should be "fsl,<processor>-flexcan" and "fsl,flexcan". An implementation should also claim any of the following compatibles that it is fully backwards compatible with: - fsl,p1010-rdb > What would be the use of it in that implementation? It limits the number of compatibles a driver has to care about, so you don't need a huge ID table just to be able to figure out whether this is a p1010-style flexcan or ARM-style. -Scott
On Wed, Aug 10, 2011 at 12:36:22PM -0500, Scott Wood wrote: > On 08/10/2011 12:19 PM, Robin Holt wrote: > > On Wed, Aug 10, 2011 at 11:56:28AM -0500, Scott Wood wrote: > >> On 08/10/2011 11:27 AM, Robin Holt wrote: > >>> -CPI Clock- Can Protocol Interface Clock > >>> - This CLK_SRC bit of CTRL(control register) selects the clock source to > >>> - the CAN Protocol Interface(CPI) to be either the peripheral clock > >>> - (driven by the PLL) or the crystal oscillator clock. The selected clock > >>> - is the one fed to the prescaler to generate the Serial Clock (Sclock). > >>> - The PRESDIV field of CTRL(control register) controls a prescaler that > >>> - generates the Serial Clock (Sclock), whose period defines the > >>> - time quantum used to compose the CAN waveform. > >>> +- compatible : Should be "fsl,flexcan" and optionally > >>> + "fsl,flexcan-<processor>" > >> > >> fsl,<processor>-flexcan, and it should not be optional, and should come > >> before "fsl,flexcan". > >> > >> Also may want to list fsl,p1010-rdb as a "canonical compatible" for > >> anything which is backwards compatible with p1010's implementation. > > > > How do I specify 'canonical compatible'? > > Something like: > > compatible: Should be "fsl,<processor>-flexcan" and "fsl,flexcan". > > An implementation should also claim any of the following compatibles > that it is fully backwards compatible with: > > - fsl,p1010-rdb I am so confused. fsl,p1010-flexcan refers, in my mind at least, to a particular chiplet on the p1010 freescale processor. fsl,p1010-rdb would mean nothing to me as that is a p1010 processor with two flexcan chiplets wired to a pair of DB-9 jacks. For the driver, what additional information is being conveyed? Let's cut to the chase. Here is what I have after incorporating your earlier comment about the compatible line. Please mark this up to exactly what you are asking for. Thanks, Robin ------------------------------------------------------------------------ Flexcan CAN contoller on Freescale's ARM and PowerPC processors Required properties: - compatible : Should be "fsl,<processor>-flexcan" and "fsl,flexcan" - reg : Offset and length of the register set for this device - interrupts : Interrupt tuple for this device Example: can@1c000 { compatible = "fsl,p1010-flexcan", "fsl,flexcan"; reg = <0x1c000 0x1000>; interrupts = <48 0x2>; interrupt-parent = <&mpic>; };
On 08/10/2011 01:30 PM, Robin Holt wrote: > On Wed, Aug 10, 2011 at 12:36:22PM -0500, Scott Wood wrote: >> On 08/10/2011 12:19 PM, Robin Holt wrote: >>> On Wed, Aug 10, 2011 at 11:56:28AM -0500, Scott Wood wrote: >>>> Also may want to list fsl,p1010-rdb as a "canonical compatible" for >>>> anything which is backwards compatible with p1010's implementation. >>> >>> How do I specify 'canonical compatible'? >> >> Something like: >> >> compatible: Should be "fsl,<processor>-flexcan" and "fsl,flexcan". >> >> An implementation should also claim any of the following compatibles >> that it is fully backwards compatible with: >> >> - fsl,p1010-rdb Gah, I don't know how "rdb" replaced "flexcan" in the above. Sorry for any confusion. > I am so confused. fsl,p1010-flexcan refers, in my mind at least, to > a particular chiplet on the p1010 freescale processor. It refers to a particular version of the flexcan logic, for which the hardware doc people weren't kind enough to give us a public version number. It has been common and recommended practice in such cases, when there are multiple chips containing the same device, to pick a canonical chip (such as the first one to have the device or to be supported) and have others claim compatibility with it. > fsl,p1010-rdb > would mean nothing to me as that is a p1010 processor with two flexcan > chiplets wired to a pair of DB-9 jacks. For the driver, what additional > information is being conveyed? The programming model of the flexcan chiplet. > Let's cut to the chase. Here is what I have after incorporating your > earlier comment about the compatible line. Please mark this up to > exactly what you are asking for. > > Thanks, > Robin > ------------------------------------------------------------------------ > Flexcan CAN contoller on Freescale's ARM and PowerPC processors > > Required properties: > > - compatible : Should be "fsl,<processor>-flexcan" and "fsl,flexcan" An implementation should also claim any of the following compatibles that it is fully backwards compatible with: - fsl,p1010-flexcan > - reg : Offset and length of the register set for this device > - interrupts : Interrupt tuple for this device > > Example: > > can@1c000 { > compatible = "fsl,p1010-flexcan", "fsl,flexcan"; > reg = <0x1c000 0x1000>; > interrupts = <48 0x2>; > interrupt-parent = <&mpic>; > }; > -Scott
On Wed, Aug 10, 2011 at 01:40:30PM -0500, Scott Wood wrote: > On 08/10/2011 01:30 PM, Robin Holt wrote: > > On Wed, Aug 10, 2011 at 12:36:22PM -0500, Scott Wood wrote: > >> On 08/10/2011 12:19 PM, Robin Holt wrote: > >>> On Wed, Aug 10, 2011 at 11:56:28AM -0500, Scott Wood wrote: > >>>> Also may want to list fsl,p1010-rdb as a "canonical compatible" for > >>>> anything which is backwards compatible with p1010's implementation. > >>> > >>> How do I specify 'canonical compatible'? > >> > >> Something like: > >> > >> compatible: Should be "fsl,<processor>-flexcan" and "fsl,flexcan". > >> > >> An implementation should also claim any of the following compatibles > >> that it is fully backwards compatible with: > >> > >> - fsl,p1010-rdb > > Gah, I don't know how "rdb" replaced "flexcan" in the above. Sorry for > any confusion. > > > I am so confused. fsl,p1010-flexcan refers, in my mind at least, to > > a particular chiplet on the p1010 freescale processor. > > It refers to a particular version of the flexcan logic, for which the > hardware doc people weren't kind enough to give us a public version number. > > It has been common and recommended practice in such cases, when there > are multiple chips containing the same device, to pick a canonical chip > (such as the first one to have the device or to be supported) and have > others claim compatibility with it. > > > fsl,p1010-rdb > > would mean nothing to me as that is a p1010 processor with two flexcan > > chiplets wired to a pair of DB-9 jacks. For the driver, what additional > > information is being conveyed? > > The programming model of the flexcan chiplet. > > > Let's cut to the chase. Here is what I have after incorporating your > > earlier comment about the compatible line. Please mark this up to > > exactly what you are asking for. > > > > Thanks, > > Robin > > ------------------------------------------------------------------------ > > Flexcan CAN contoller on Freescale's ARM and PowerPC processors > > > > Required properties: > > > > - compatible : Should be "fsl,<processor>-flexcan" and "fsl,flexcan" > > An implementation should also claim any of the following compatibles > that it is fully backwards compatible with: > > - fsl,p1010-flexcan Ah, there is my confusion. I did not realize you were saying the entire preceeding 4 lines should be included. I thought you were making a comment which I did not understand. Thank you for your patience with my ignorance, Robin
diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt index 1a729f0..869f4ca 100644 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt @@ -1,61 +1,17 @@ -CAN Device Tree Bindings ------------------------- -2011 Freescale Semiconductor, Inc. +Flexcan CAN contoller on Freescale's ARM and PowerPC processors -fsl,flexcan-v1.0 nodes ------------------------ -In addition to the required compatible-, reg- and interrupt-properties, you can -also specify which clock source shall be used for the controller. +Required properties: -CPI Clock- Can Protocol Interface Clock - This CLK_SRC bit of CTRL(control register) selects the clock source to - the CAN Protocol Interface(CPI) to be either the peripheral clock - (driven by the PLL) or the crystal oscillator clock. The selected clock - is the one fed to the prescaler to generate the Serial Clock (Sclock). - The PRESDIV field of CTRL(control register) controls a prescaler that - generates the Serial Clock (Sclock), whose period defines the - time quantum used to compose the CAN waveform. +- compatible : Should be "fsl,flexcan" and optionally + "fsl,flexcan-<processor>" +- reg : Offset and length of the register set for this device +- interrupts : Interrupt tuple for this device -Can Engine Clock Source - There are two sources for CAN clock - - Platform Clock It represents the bus clock - - Oscillator Clock +Example: - Peripheral Clock (PLL) - -------------- - | - --------- ------------- - | |CPI Clock | Prescaler | Sclock - | |---------------->| (1.. 256) |------------> - --------- ------------- - | | - -------------- ---------------------CLK_SRC - Oscillator Clock - -- fsl,flexcan-clock-source : CAN Engine Clock Source.This property selects - the peripheral clock. PLL clock is fed to the - prescaler to generate the Serial Clock (Sclock). - Valid values are "oscillator" and "platform" - "oscillator": CAN engine clock source is oscillator clock. - "platform" The CAN engine clock source is the bus clock - (platform clock). - -- fsl,flexcan-clock-divider : for the reference and system clock, an additional - clock divider can be specified. -- clock-frequency: frequency required to calculate the bitrate for FlexCAN. - -Note: - - v1.0 of flexcan-v1.0 represent the IP block version for P1010 SOC. - - P1010 does not have oscillator as the Clock Source.So the default - Clock Source is platform clock. -Examples: - - can0@1c000 { - compatible = "fsl,flexcan-v1.0"; - reg = <0x1c000 0x1000>; - interrupts = <48 0x2>; - interrupt-parent = <&mpic>; - fsl,flexcan-clock-source = "platform"; - fsl,flexcan-clock-divider = <2>; - clock-frequency = <fixed by u-boot>; - }; + can@1c000 { + compatible = "fsl,p1010-flexcan", "fsl,flexcan"; + reg = <0x1c000 0x1000>; + interrupts = <48 0x2>; + interrupt-parent = <&mpic>; + }; diff --git a/arch/powerpc/boot/dts/p1010rdb.dts b/arch/powerpc/boot/dts/p1010rdb.dts index 6b33b73..d6c669c 100644 --- a/arch/powerpc/boot/dts/p1010rdb.dts +++ b/arch/powerpc/boot/dts/p1010rdb.dts @@ -23,6 +23,8 @@ ethernet2 = &enet2; pci0 = &pci0; pci1 = &pci1; + can0 = &can0; + can1 = &can1; }; memory { @@ -169,14 +171,6 @@ }; }; - can0@1c000 { - fsl,flexcan-clock-source = "platform"; - }; - - can1@1d000 { - fsl,flexcan-clock-source = "platform"; - }; - usb@22000 { phy_type = "utmi"; }; diff --git a/arch/powerpc/boot/dts/p1010si.dtsi b/arch/powerpc/boot/dts/p1010si.dtsi index 7f51104..f00076b 100644 --- a/arch/powerpc/boot/dts/p1010si.dtsi +++ b/arch/powerpc/boot/dts/p1010si.dtsi @@ -140,20 +140,18 @@ interrupt-parent = <&mpic>; }; - can0@1c000 { - compatible = "fsl,flexcan-v1.0"; + can0: can@1c000 { + compatible = "fsl,p1010-flexcan", "fsl,flexcan"; reg = <0x1c000 0x1000>; interrupts = <48 0x2>; interrupt-parent = <&mpic>; - fsl,flexcan-clock-divider = <2>; }; - can1@1d000 { - compatible = "fsl,flexcan-v1.0"; + can1: can@1d000 { + compatible = "fsl,p1010-flexcan", "fsl,flexcan"; reg = <0x1d000 0x1000>; interrupts = <61 0x2>; interrupt-parent = <&mpic>; - fsl,flexcan-clock-divider = <2>; }; L2: l2-cache-controller@20000 {