[U-Boot,i.MX8MM+CCF,34/41] imx8m: soc: enable SCTR clock before timer init
diff mbox series

Message ID 20190430103056.32537-35-peng.fan@nxp.com
State Needs Review / ACK
Delegated to: Stefano Babic
Headers show
Series
  • i.MX8MM + CCF
Related show

Commit Message

Peng Fan April 30, 2019, 10:19 a.m. UTC
To i.MX8MM SCTR clock is disabled by ROM, so before timer init
need to enable it.
To i.MX8MQ, it does not hurt the clock is enabled again.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 arch/arm/mach-imx/imx8m/soc.c | 6 ++++++
 1 file changed, 6 insertions(+)

Patch
diff mbox series

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index abf526bc68..ea83a495c2 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -234,6 +234,12 @@  static void imx_set_wdog_powerdown(bool enable)
 
 int arch_cpu_init(void)
 {
+	/*
+	 * ROM might disable clock for SCTR,
+	 * enable the clock before timer_init.
+	 */
+	if (IS_ENABLED(CONFIG_SPL_BUILD))
+		clock_enable(CCGR_SCTR, 1);
 	/*
 	 * Init timer at very early state, because sscg pll setting
 	 * will use it