From patchwork Tue Apr 30 10:19:21 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 1093169 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=nxp.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=nxp.com header.i=@nxp.com header.b="CTW84/yS"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 44tdGc0gDwz9sBV for ; Tue, 30 Apr 2019 20:35:52 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id CB507C21E6A; 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Tue, 30 Apr 2019 10:19:21 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1835.018; Tue, 30 Apr 2019 10:19:21 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" , "lukma@denx.de" Thread-Topic: [i.MX8MM+CCF 31/41] imx8m: Fix MMU table issue for OPTEE memory Thread-Index: AQHU/z4tORdzbtlR70mH6FZEjpVQSQ== Date: Tue, 30 Apr 2019 10:19:21 +0000 Message-ID: <20190430103056.32537-32-peng.fan@nxp.com> References: <20190430103056.32537-1-peng.fan@nxp.com> In-Reply-To: <20190430103056.32537-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK0PR03CA0057.apcprd03.prod.outlook.com (2603:1096:203:52::21) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR04MB5204; H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: TpucpuJQNDlczFZp4GErERapX92a4EzpvQr8CaE2A/djPb7evIZBBCD3xsNZ5QlPaOxtwpGPlAupeO15r0Y8abFnb3B5/x27duG51hlDGbTZzlsn2GxDZHOiJPIwJJuKVqBqK/RdvGIo7WyA1vydFi+daxqiIryY1YDbUjalqItJtB65YtqJ1VXVz3bimL8ghcZcZs818tlMLlgCsiXiH8QOYSX3uVA/CacXg8EP05ujbgvOQp6zPgm1+wG4Aa+5E7m9WllFeUKYOgHkoDKL97u8CzUiuNokh4ihVJXjmMSVs1t0rLizzwf8A1p9ezlD50a9DXjVyShNeRtBC7qMkvoph+NMxlzTE3+DyzvlZzI5Mow3OiieshbRHoq5hleSbcHbmL+B9ZwPN0Zkr5fpxfBb0fbuJVSwpWCY76z8DjE= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 87f20b03-a56b-4119-3383-08d6cd554f70 X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Apr 2019 10:19:21.0480 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB5204 Cc: "trini@konsulko.com" , "u-boot@lists.denx.de" , dl-uboot-imx , "sr@denx.de" Subject: [U-Boot] [i.MX8MM+CCF 31/41] imx8m: Fix MMU table issue for OPTEE memory X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When running with OPTEE, the MMU table in u-boot does not remove the OPTEE memory from its settings. So ARM speculative prefetch in u-boot may access that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory is set to secure access, then the speculative prefetch will fail and cause various memory issue in u-boot. The fail address register and int_status register in trustzone has logged that speculative access from u-boot. Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8m/soc.c | 20 ++++++++++++++++++-- 1 file changed, 18 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c index 07cda86bdd..5e9481c565 100644 --- a/arch/arm/mach-imx/imx8m/soc.c +++ b/arch/arm/mach-imx/imx8m/soc.c @@ -116,16 +116,18 @@ static struct mm_region imx8m_mem_map[] = { /* DRAM1 */ .virt = 0x40000000UL, .phys = 0x40000000UL, - .size = 0xC0000000UL, + .size = PHYS_SDRAM_SIZE, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE +#ifdef PHYS_SDRAM_2_SIZE }, { /* DRAM2 */ .virt = 0x100000000UL, .phys = 0x100000000UL, - .size = 0x040000000UL, + .size = PHYS_SDRAM_2_SIZE, .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | PTE_BLOCK_OUTER_SHARE +#endif }, { /* List terminator */ 0, @@ -134,6 +136,20 @@ static struct mm_region imx8m_mem_map[] = { struct mm_region *mem_map = imx8m_mem_map; +void enable_caches(void) +{ + /* + * If OPTEE runs, remove OPTEE memory from MMU table to + * avoid speculative prefetch. OPTEE runs at the top of + * the first memory bank + */ + if (rom_pointer[1]) + imx8m_mem_map[5].size -= rom_pointer[1]; + + icache_enable(); + dcache_enable(); +} + static u32 get_cpu_variant_type(u32 type) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;