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Tue, 30 Apr 2019 10:17:47 +0000 Received: from AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378]) by AM0PR04MB4481.eurprd04.prod.outlook.com ([fe80::3173:24:d401:2378%6]) with mapi id 15.20.1835.018; Tue, 30 Apr 2019 10:17:47 +0000 From: Peng Fan To: "sbabic@denx.de" , "festevam@gmail.com" , "lukma@denx.de" Thread-Topic: [i.MX8MM+CCF 05/41] clk-provider: sync more clk flags from Linux Kernel Thread-Index: AQHU/z31EAUZpC+b+E6a3t4E/9qulA== Date: Tue, 30 Apr 2019 10:17:47 +0000 Message-ID: <20190430103056.32537-6-peng.fan@nxp.com> References: <20190430103056.32537-1-peng.fan@nxp.com> In-Reply-To: <20190430103056.32537-1-peng.fan@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.16.4 x-clientproxiedby: HK0PR03CA0057.apcprd03.prod.outlook.com (2603:1096:203:52::21) To AM0PR04MB4481.eurprd04.prod.outlook.com (2603:10a6:208:70::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=peng.fan@nxp.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:AM0PR04MB4593; H:AM0PR04MB4481.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; A:1; MX:1; received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: 8BanmU77RUll6cBLYQTZklJHtflorfZ9YGbsy9fJ/E0YcnLpinWBLAQFh65rcDM+p4452k4KZVvjYdkbPqENByftJoQzXR13X6ia7LKoKTTpUFiwY38Z8Q0aKSpU6MTDETnJ4PK+FsB0WSq+TQzuJrbS8pLIpbSC/oDcR0+8JXtBwAa7NfCYeRa5XAMHNh7TSGWqylWzhcYJfDVs/Wjt84FPU8tgrAmzccsX5gqcrX4WI2f2RO1s2xYF+Rdkb+E2naRKtYSZ7fb6ncEL2OpibfEg7U595QYBbTOr97yITe0grwDZTNVh4bYgJeaFKgiVOz1GclK684W5l86Fp47n0eOReipPtZk1gTCoCKZXW9GTVSEwDQ+TskcQBo/Jlp61olK3RY3WUyDHw8ZOZI8aPnWDQDhNGdCCwwUyF3hHUaQ= MIME-Version: 1.0 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: aaacc83c-9316-4a0e-0813-08d6cd55179c X-MS-Exchange-CrossTenant-originalarrivaltime: 30 Apr 2019 10:17:47.3628 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR04MB4593 Cc: "trini@konsulko.com" , "u-boot@lists.denx.de" , dl-uboot-imx , "sr@denx.de" Subject: [U-Boot] [i.MX8MM+CCF 05/41] clk-provider: sync more clk flags from Linux Kernel X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Sync more clk flags that might be used in U-Boot CCF. Signed-off-by: Peng Fan Reviewed-by: Lukasz Majewski --- include/linux/clk-provider.h | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index eac045c5f8..3458746a60 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -9,8 +9,29 @@ #ifndef __LINUX_CLK_PROVIDER_H #define __LINUX_CLK_PROVIDER_H +/* + * flags used across common struct clk. these flags should only affect the + * top-level framework. custom flags for dealing with hardware specifics + * belong in struct clk_foo + * + * Please update clk_flags[] in drivers/clk/clk.c when making changes here! + */ +#define CLK_SET_RATE_GATE BIT(0) /* must be gated across rate change */ +#define CLK_SET_PARENT_GATE BIT(1) /* must be gated across re-parent */ #define CLK_SET_RATE_PARENT BIT(2) /* propagate rate change up one level */ +#define CLK_IGNORE_UNUSED BIT(3) /* do not gate even if unused */ + /* unused */ +#define CLK_IS_BASIC BIT(5) /* Basic clk, can't do a to_clk_foo() */ +#define CLK_GET_RATE_NOCACHE BIT(6) /* do not use the cached clk rate */ #define CLK_SET_RATE_NO_REPARENT BIT(7) /* don't re-parent on rate change */ +#define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */ +#define CLK_RECALC_NEW_RATES BIT(9) /* recalc rates after notifications */ +#define CLK_SET_RATE_UNGATE BIT(10) /* clock needs to run to set rate */ +#define CLK_IS_CRITICAL BIT(11) /* do not gate, ever */ +/* parents need enable during gate/ungate, set rate and re-parent */ +#define CLK_OPS_PARENT_ENABLE BIT(12) +/* duty cycle call may be forwarded to the parent clock */ +#define CLK_DUTY_CYCLE_PARENT BIT(13) #define CLK_MUX_INDEX_ONE BIT(0) #define CLK_MUX_INDEX_BIT BIT(1)