@@ -10,7 +10,7 @@
#include "sh_pfc.h"
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_4(0, fn, sfx), \
PORT_GP_1(0, 4, fn, sfx), \
PORT_GP_CFG_1(0, 5, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
@@ -38,7 +38,7 @@
PORT_GP_PUP_1(bank, 24, fn, sfx), PORT_GP_PUP_1(bank, 25, fn, sfx), \
PORT_GP_PUP_1(bank, 26, fn, sfx)
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_CFG_32(0, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
PORT_GP_CFG_32(1, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
PORT_GP_CFG_32(2, fn, sfx, SH_PFC_PIN_CFG_PULL_UP), \
@@ -11,7 +11,7 @@
#include "sh_pfc.h"
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
PORT_GP_32(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \
@@ -20,7 +20,7 @@
* All pins assigned to GPIO bank 3 can be used for SD interfaces in
* which case they support both 3.3V and 1.8V signalling.
*/
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
PORT_GP_30(1, fn, sfx), \
PORT_GP_30(2, fn, sfx), \
@@ -15,7 +15,7 @@
* Pins 0-23 assigned to GPIO bank 6 can be used for SD interfaces in
* which case they support both 3.3V and 1.8V signalling.
*/
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
PORT_GP_26(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \
@@ -11,7 +11,7 @@
#include "core.h"
#include "sh_pfc.h"
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_29(0, fn, sfx), \
PORT_GP_23(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \
@@ -14,7 +14,7 @@
#include "core.h"
#include "sh_pfc.h"
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
PORT_GP_26(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \
@@ -15,7 +15,7 @@
SH_PFC_PIN_CFG_PULL_UP | \
SH_PFC_PIN_CFG_PULL_DOWN)
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_28(1, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \
@@ -16,7 +16,7 @@
SH_PFC_PIN_CFG_PULL_UP | \
SH_PFC_PIN_CFG_PULL_DOWN)
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \
@@ -21,7 +21,7 @@
SH_PFC_PIN_CFG_PULL_UP | \
SH_PFC_PIN_CFG_PULL_DOWN)
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \
@@ -22,7 +22,7 @@
SH_PFC_PIN_CFG_PULL_UP | \
SH_PFC_PIN_CFG_PULL_DOWN)
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_CFG_16(0, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_29(1, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_15(2, fn, sfx, CFG_FLAGS), \
@@ -19,7 +19,7 @@
#include "core.h"
#include "sh_pfc.h"
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
PORT_GP_28(1, fn, sfx), \
PORT_GP_CFG_17(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
@@ -19,7 +19,7 @@
#include "core.h"
#include "sh_pfc.h"
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
PORT_GP_28(1, fn, sfx), \
PORT_GP_CFG_30(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \
@@ -20,7 +20,7 @@
#define CFG_FLAGS (SH_PFC_PIN_CFG_PULL_UP | \
SH_PFC_PIN_CFG_PULL_DOWN)
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_CFG_18(0, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_23(1, fn, sfx, CFG_FLAGS), \
PORT_GP_CFG_26(2, fn, sfx, CFG_FLAGS), \
@@ -17,7 +17,7 @@
#include "core.h"
#include "sh_pfc.h"
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_9(0, fn, sfx), \
PORT_GP_32(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \
@@ -11,7 +11,7 @@
#include "sh_pfc.h"
-#define CPU_ALL_PORT(fn, sfx) \
+#define CPU_ALL_GP(fn, sfx) \
PORT_GP_32(0, fn, sfx), \
PORT_GP_32(1, fn, sfx), \
PORT_GP_32(2, fn, sfx), \
@@ -584,7 +584,7 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
/* GP_ALL(suffix) - Expand to a list of GP_#_#_suffix */
#define _GP_ALL(bank, pin, name, sfx, cfg) name##_##sfx
-#define GP_ALL(str) CPU_ALL_PORT(_GP_ALL, str)
+#define GP_ALL(str) CPU_ALL_GP(_GP_ALL, str)
/* PINMUX_GPIO_GP_ALL - Expand to a list of sh_pfc_pin entries */
#define _GP_GPIO(bank, _pin, _name, sfx, cfg) \
@@ -594,11 +594,11 @@ extern const struct sh_pfc_soc_info shx3_pinmux_info;
.enum_id = _name##_DATA, \
.configs = cfg, \
}
-#define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, unused)
+#define PINMUX_GPIO_GP_ALL() CPU_ALL_GP(_GP_GPIO, unused)
/* PINMUX_DATA_GP_ALL - Expand to a list of name_DATA, name_FN marks */
#define _GP_DATA(bank, pin, name, sfx, cfg) PINMUX_DATA(name##_DATA, name##_FN)
-#define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, unused)
+#define PINMUX_DATA_GP_ALL() CPU_ALL_GP(_GP_DATA, unused)
/*
* PORT style (linear pin space)
There are two variants of the CPU_ALL_PORT() macro in use: 1. A three-parameter variant, to be provided for SoCs with a linear GPIO pin space ("PORT style"), 2. A two-parameter variant, to be provided for SoCs with 32-port GPIO banks ("GP port style"). Rename the 2-parameter variant to CPU_ALL_GP(), to avoid confusion, and to increase naming consistency. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> --- drivers/pinctrl/sh-pfc/pfc-r8a77470.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a7778.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a7791.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a7792.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a7795-es1.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a7795.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a7796.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a77965.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a77970.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a77980.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a77990.c | 2 +- drivers/pinctrl/sh-pfc/pfc-r8a77995.c | 2 +- drivers/pinctrl/sh-pfc/pfc-sh7734.c | 2 +- drivers/pinctrl/sh-pfc/sh_pfc.h | 6 +++--- 17 files changed, 19 insertions(+), 19 deletions(-)