| Message ID | 20190423092825.759-27-mmaddireddy@nvidia.com |
|---|---|
| State | Superseded |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | Enable Tegra PCIe root port features | expand |
On Tue, Apr 23, 2019 at 02:58:23PM +0530, Manikanta Maddireddy wrote: > Document "reset-gpio" optional property which supports GPIO based PERST# > signal. > > Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> > --- > V2: Using standard "reset-gpio" property > > .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt > index 7939bca47861..4e75e017f660 100644 > --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt > @@ -162,6 +162,10 @@ Required properties: > - Root port 0 uses 4 lanes, root port 1 is unused. > - Both root ports use 2 lanes. > > +Optional properties: > +- reset-gpio: If GPIO is used as PERST# signal instead of available > + SFIO, add this property with phandle to GPIO controller and GPIO number. 'reset-gpios' is the preferred form. This is already defined in several other drivers. Perhaps document in a common location and also parse the property in common code. Rob
On Tue, Apr 23, 2019 at 02:58:23PM +0530, Manikanta Maddireddy wrote: > Document "reset-gpio" optional property which supports GPIO based PERST# > signal. > > Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> > --- > V2: Using standard "reset-gpio" property > > .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt > index 7939bca47861..4e75e017f660 100644 > --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt > @@ -162,6 +162,10 @@ Required properties: > - Root port 0 uses 4 lanes, root port 1 is unused. > - Both root ports use 2 lanes. > > +Optional properties: > +- reset-gpio: If GPIO is used as PERST# signal instead of available > + SFIO, add this property with phandle to GPIO controller and GPIO number. > + > Required properties for Tegra124 and later: > - phys: Must contain an phandle to a PHY for each entry in phy-names. > - phy-names: Must include an entry for each active lane. Note that the number > @@ -626,6 +630,7 @@ SoC DTSI: > ranges; > > nvidia,num-lanes = <2>; > + reset-gpio = <&gpio TEGRA_GPIO(A, 3) 0>; Nit: it's customary to put vendor-specific properties below generic ones. Thierry
On Thu, May 09, 2019 at 04:37:29PM +0200, Thierry Reding wrote: > On Tue, Apr 23, 2019 at 02:58:23PM +0530, Manikanta Maddireddy wrote: > > Document "reset-gpio" optional property which supports GPIO based PERST# > > signal. > > > > Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> > > --- > > V2: Using standard "reset-gpio" property > > > > .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt | 5 +++++ > > 1 file changed, 5 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt > > index 7939bca47861..4e75e017f660 100644 > > --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt > > +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt > > @@ -162,6 +162,10 @@ Required properties: > > - Root port 0 uses 4 lanes, root port 1 is unused. > > - Both root ports use 2 lanes. > > > > +Optional properties: > > +- reset-gpio: If GPIO is used as PERST# signal instead of available > > + SFIO, add this property with phandle to GPIO controller and GPIO number. > > + > > Required properties for Tegra124 and later: > > - phys: Must contain an phandle to a PHY for each entry in phy-names. > > - phy-names: Must include an entry for each active lane. Note that the number > > @@ -626,6 +630,7 @@ SoC DTSI: > > ranges; > > > > nvidia,num-lanes = <2>; > > + reset-gpio = <&gpio TEGRA_GPIO(A, 3) 0>; > > Nit: it's customary to put vendor-specific properties below generic > ones. With that: Acked-by: Thierry Reding <treding@nvidia.com>
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt index 7939bca47861..4e75e017f660 100644 --- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt +++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt @@ -162,6 +162,10 @@ Required properties: - Root port 0 uses 4 lanes, root port 1 is unused. - Both root ports use 2 lanes. +Optional properties: +- reset-gpio: If GPIO is used as PERST# signal instead of available + SFIO, add this property with phandle to GPIO controller and GPIO number. + Required properties for Tegra124 and later: - phys: Must contain an phandle to a PHY for each entry in phy-names. - phy-names: Must include an entry for each active lane. Note that the number @@ -626,6 +630,7 @@ SoC DTSI: ranges; nvidia,num-lanes = <2>; + reset-gpio = <&gpio TEGRA_GPIO(A, 3) 0>; }; pci@2,0 {
Document "reset-gpio" optional property which supports GPIO based PERST# signal. Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com> --- V2: Using standard "reset-gpio" property .../devicetree/bindings/pci/nvidia,tegra20-pcie.txt | 5 +++++ 1 file changed, 5 insertions(+)