| Message ID | 20190422115538.5910-1-pankaj.bansal@nxp.com |
|---|---|
| State | Accepted |
| Commit | 1be0c66c792d0d51debf45de3bc4eb5cafc6271d |
| Delegated to: | Prabhakar Kushwaha |
| Headers | show |
| Series | [U-Boot] board/fsl/layerscape: Modify the aliases names | expand |
+ Cristi, Hi Cristi, Can you please review this patch? Regards, Pankaj Bansal > -----Original Message----- > From: Pankaj Bansal <pankaj.bansal@nxp.com> > Sent: Monday, 22 April, 2019 12:02 PM > To: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> > Cc: u-boot@lists.denx.de; Pankaj Bansal <pankaj.bansal@nxp.com> > Subject: [PATCH] board/fsl/layerscape: Modify the aliases names > > when compiling dts file using DTC_FLAG='-@', the device tree compiler reports > these warnings: > > Warning (alias_paths): /aliases: aliases property name must include only > lowercase and '-' > > Fixed the node aliases to silence these warnings. > > Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> > --- > board/freescale/ls1043aqds/eth.c | 33 +++++++++++++++--------------- > board/freescale/ls1046aqds/eth.c | 26 +++++++++++------------ > 2 files changed, 30 insertions(+), 29 deletions(-) > > diff --git a/board/freescale/ls1043aqds/eth.c > b/board/freescale/ls1043aqds/eth.c > index 8763913e31..e1919d2988 100644 > --- a/board/freescale/ls1043aqds/eth.c > +++ b/board/freescale/ls1043aqds/eth.c > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > * Copyright 2015 Freescale Semiconductor, Inc. > + * Copyright 2019 NXP > */ > > #include <common.h> > @@ -161,16 +162,16 @@ void board_ft_fman_fixup_port(void *fdt, char > *compat, phys_addr_t addr, > if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { > if (port == FM1_DTSEC9) { > fdt_set_phy_handle(fdt, compat, addr, > - "sgmii_riser_s1_p1"); > + "sgmii-riser-s1-p1"); > } else if (port == FM1_DTSEC2) { > fdt_set_phy_handle(fdt, compat, addr, > - "sgmii_riser_s2_p1"); > + "sgmii-riser-s2-p1"); > } else if (port == FM1_DTSEC5) { > fdt_set_phy_handle(fdt, compat, addr, > - "sgmii_riser_s3_p1"); > + "sgmii-riser-s3-p1"); > } else if (port == FM1_DTSEC6) { > fdt_set_phy_handle(fdt, compat, addr, > - "sgmii_riser_s4_p1"); > + "sgmii-riser-s4-p1"); > } > } else if (fm_info_get_enet_if(port) == > PHY_INTERFACE_MODE_SGMII_2500) { > @@ -191,19 +192,19 @@ void board_ft_fman_fixup_port(void *fdt, char > *compat, phys_addr_t addr, > switch (port) { > case FM1_DTSEC1: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s1_p1"); > + "qsgmii-s1-p1"); > break; > case FM1_DTSEC2: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s1_p2"); > + "qsgmii-s1-p2"); > break; > case FM1_DTSEC5: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s1_p3"); > + "qsgmii-s1-p3"); > break; > case FM1_DTSEC6: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s1_p4"); > + "qsgmii-s1-p4"); > break; > default: > break; > @@ -213,19 +214,19 @@ void board_ft_fman_fixup_port(void *fdt, char > *compat, phys_addr_t addr, > switch (port) { > case FM1_DTSEC1: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s2_p1"); > + "qsgmii-s2-p1"); > break; > case FM1_DTSEC2: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s2_p2"); > + "qsgmii-s2-p2"); > break; > case FM1_DTSEC5: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s2_p3"); > + "qsgmii-s2-p3"); > break; > case FM1_DTSEC6: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s2_p4"); > + "qsgmii-s2-p4"); > break; > default: > break; > @@ -268,16 +269,16 @@ void fdt_fixup_board_enet(void *fdt) > case PHY_INTERFACE_MODE_QSGMII: > switch (mdio_mux[i]) { > case EMI1_SLOT1: > - fdt_status_okay_by_alias(fdt, "emi1_slot1"); > + fdt_status_okay_by_alias(fdt, "emi1-slot1"); > break; > case EMI1_SLOT2: > - fdt_status_okay_by_alias(fdt, "emi1_slot2"); > + fdt_status_okay_by_alias(fdt, "emi1-slot2"); > break; > case EMI1_SLOT3: > - fdt_status_okay_by_alias(fdt, "emi1_slot3"); > + fdt_status_okay_by_alias(fdt, "emi1-slot3"); > break; > case EMI1_SLOT4: > - fdt_status_okay_by_alias(fdt, "emi1_slot4"); > + fdt_status_okay_by_alias(fdt, "emi1-slot4"); > break; > default: > break; > diff --git a/board/freescale/ls1046aqds/eth.c > b/board/freescale/ls1046aqds/eth.c > index abe8ee95d4..1eb40677b5 100644 > --- a/board/freescale/ls1046aqds/eth.c > +++ b/board/freescale/ls1046aqds/eth.c > @@ -1,7 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > * Copyright 2016 Freescale Semiconductor, Inc. > - * Copyright 2018 NXP > + * Copyright 2018-2019 NXP > */ > > #include <common.h> > @@ -161,19 +161,19 @@ void board_ft_fman_fixup_port(void *fdt, char > *compat, phys_addr_t addr, > if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { > switch (port) { > case FM1_DTSEC9: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p1"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p1"); > break; > case FM1_DTSEC10: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p2"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p2"); > break; > case FM1_DTSEC5: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p3"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p3"); > break; > case FM1_DTSEC6: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p4"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p4"); > break; > case FM1_DTSEC2: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s4_p1"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s4-p1"); > break; > default: > break; > @@ -193,16 +193,16 @@ void board_ft_fman_fixup_port(void *fdt, char > *compat, phys_addr_t addr, > } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_QSGMII) > { > switch (port) { > case FM1_DTSEC1: > - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p4"); > + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p4"); > break; > case FM1_DTSEC5: > - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p2"); > + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p2"); > break; > case FM1_DTSEC6: > - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p1"); > + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p1"); > break; > case FM1_DTSEC10: > - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p3"); > + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p3"); > break; > default: > break; > @@ -246,13 +246,13 @@ void fdt_fixup_board_enet(void *fdt) > case PHY_INTERFACE_MODE_QSGMII: > switch (mdio_mux[i]) { > case EMI1_SLOT1: > - fdt_status_okay_by_alias(fdt, "emi1_slot1"); > + fdt_status_okay_by_alias(fdt, "emi1-slot1"); > break; > case EMI1_SLOT2: > - fdt_status_okay_by_alias(fdt, "emi1_slot2"); > + fdt_status_okay_by_alias(fdt, "emi1-slot2"); > break; > case EMI1_SLOT4: > - fdt_status_okay_by_alias(fdt, "emi1_slot4"); > + fdt_status_okay_by_alias(fdt, "emi1-slot4"); > break; > default: > break; > -- > 2.17.1
ACK -----Original Message----- From: Pankaj Bansal Sent: Tuesday, May 21, 2019 2:16 PM To: Pankaj Bansal <pankaj.bansal@nxp.com>; Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>; Cristi Sovaiala <cristian.sovaiala@nxp.com> Cc: u-boot@lists.denx.de Subject: RE: [PATCH] board/fsl/layerscape: Modify the aliases names + Cristi, Hi Cristi, Can you please review this patch? Regards, Pankaj Bansal > -----Original Message----- > From: Pankaj Bansal <pankaj.bansal@nxp.com> > Sent: Monday, 22 April, 2019 12:02 PM > To: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> > Cc: u-boot@lists.denx.de; Pankaj Bansal <pankaj.bansal@nxp.com> > Subject: [PATCH] board/fsl/layerscape: Modify the aliases names > > when compiling dts file using DTC_FLAG='-@', the device tree compiler > reports these warnings: > > Warning (alias_paths): /aliases: aliases property name must include > only lowercase and '-' > > Fixed the node aliases to silence these warnings. > > Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> > --- > board/freescale/ls1043aqds/eth.c | 33 +++++++++++++++--------------- > board/freescale/ls1046aqds/eth.c | 26 +++++++++++------------ > 2 files changed, 30 insertions(+), 29 deletions(-) > > diff --git a/board/freescale/ls1043aqds/eth.c > b/board/freescale/ls1043aqds/eth.c > index 8763913e31..e1919d2988 100644 > --- a/board/freescale/ls1043aqds/eth.c > +++ b/board/freescale/ls1043aqds/eth.c > @@ -1,6 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > * Copyright 2015 Freescale Semiconductor, Inc. > + * Copyright 2019 NXP > */ > > #include <common.h> > @@ -161,16 +162,16 @@ void board_ft_fman_fixup_port(void *fdt, char > *compat, phys_addr_t addr, > if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { > if (port == FM1_DTSEC9) { > fdt_set_phy_handle(fdt, compat, addr, > - "sgmii_riser_s1_p1"); > + "sgmii-riser-s1-p1"); > } else if (port == FM1_DTSEC2) { > fdt_set_phy_handle(fdt, compat, addr, > - "sgmii_riser_s2_p1"); > + "sgmii-riser-s2-p1"); > } else if (port == FM1_DTSEC5) { > fdt_set_phy_handle(fdt, compat, addr, > - "sgmii_riser_s3_p1"); > + "sgmii-riser-s3-p1"); > } else if (port == FM1_DTSEC6) { > fdt_set_phy_handle(fdt, compat, addr, > - "sgmii_riser_s4_p1"); > + "sgmii-riser-s4-p1"); > } > } else if (fm_info_get_enet_if(port) == > PHY_INTERFACE_MODE_SGMII_2500) { @@ -191,19 +192,19 @@ void > board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, > switch (port) { > case FM1_DTSEC1: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s1_p1"); > + "qsgmii-s1-p1"); > break; > case FM1_DTSEC2: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s1_p2"); > + "qsgmii-s1-p2"); > break; > case FM1_DTSEC5: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s1_p3"); > + "qsgmii-s1-p3"); > break; > case FM1_DTSEC6: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s1_p4"); > + "qsgmii-s1-p4"); > break; > default: > break; > @@ -213,19 +214,19 @@ void board_ft_fman_fixup_port(void *fdt, char > *compat, phys_addr_t addr, > switch (port) { > case FM1_DTSEC1: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s2_p1"); > + "qsgmii-s2-p1"); > break; > case FM1_DTSEC2: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s2_p2"); > + "qsgmii-s2-p2"); > break; > case FM1_DTSEC5: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s2_p3"); > + "qsgmii-s2-p3"); > break; > case FM1_DTSEC6: > fdt_set_phy_handle(fdt, compat, addr, > - "qsgmii_s2_p4"); > + "qsgmii-s2-p4"); > break; > default: > break; > @@ -268,16 +269,16 @@ void fdt_fixup_board_enet(void *fdt) > case PHY_INTERFACE_MODE_QSGMII: > switch (mdio_mux[i]) { > case EMI1_SLOT1: > - fdt_status_okay_by_alias(fdt, "emi1_slot1"); > + fdt_status_okay_by_alias(fdt, "emi1-slot1"); > break; > case EMI1_SLOT2: > - fdt_status_okay_by_alias(fdt, "emi1_slot2"); > + fdt_status_okay_by_alias(fdt, "emi1-slot2"); > break; > case EMI1_SLOT3: > - fdt_status_okay_by_alias(fdt, "emi1_slot3"); > + fdt_status_okay_by_alias(fdt, "emi1-slot3"); > break; > case EMI1_SLOT4: > - fdt_status_okay_by_alias(fdt, "emi1_slot4"); > + fdt_status_okay_by_alias(fdt, "emi1-slot4"); > break; > default: > break; > diff --git a/board/freescale/ls1046aqds/eth.c > b/board/freescale/ls1046aqds/eth.c > index abe8ee95d4..1eb40677b5 100644 > --- a/board/freescale/ls1046aqds/eth.c > +++ b/board/freescale/ls1046aqds/eth.c > @@ -1,7 +1,7 @@ > // SPDX-License-Identifier: GPL-2.0+ > /* > * Copyright 2016 Freescale Semiconductor, Inc. > - * Copyright 2018 NXP > + * Copyright 2018-2019 NXP > */ > > #include <common.h> > @@ -161,19 +161,19 @@ void board_ft_fman_fixup_port(void *fdt, char > *compat, phys_addr_t addr, > if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { > switch (port) { > case FM1_DTSEC9: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p1"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p1"); > break; > case FM1_DTSEC10: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p2"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p2"); > break; > case FM1_DTSEC5: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p3"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p3"); > break; > case FM1_DTSEC6: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p4"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p4"); > break; > case FM1_DTSEC2: > - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s4_p1"); > + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s4-p1"); > break; > default: > break; > @@ -193,16 +193,16 @@ void board_ft_fman_fixup_port(void *fdt, char > *compat, phys_addr_t addr, > } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_QSGMII) { > switch (port) { > case FM1_DTSEC1: > - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p4"); > + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p4"); > break; > case FM1_DTSEC5: > - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p2"); > + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p2"); > break; > case FM1_DTSEC6: > - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p1"); > + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p1"); > break; > case FM1_DTSEC10: > - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p3"); > + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p3"); > break; > default: > break; > @@ -246,13 +246,13 @@ void fdt_fixup_board_enet(void *fdt) > case PHY_INTERFACE_MODE_QSGMII: > switch (mdio_mux[i]) { > case EMI1_SLOT1: > - fdt_status_okay_by_alias(fdt, "emi1_slot1"); > + fdt_status_okay_by_alias(fdt, "emi1-slot1"); > break; > case EMI1_SLOT2: > - fdt_status_okay_by_alias(fdt, "emi1_slot2"); > + fdt_status_okay_by_alias(fdt, "emi1-slot2"); > break; > case EMI1_SLOT4: > - fdt_status_okay_by_alias(fdt, "emi1_slot4"); > + fdt_status_okay_by_alias(fdt, "emi1-slot4"); > break; > default: > break; > -- > 2.17.1
> -----Original Message----- > From: Pankaj Bansal > Sent: Monday, April 22, 2019 12:02 PM > To: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> > Cc: u-boot@lists.denx.de; Pankaj Bansal <pankaj.bansal@nxp.com> > Subject: [PATCH] board/fsl/layerscape: Modify the aliases names > > when compiling dts file using DTC_FLAG='-@', the device tree compiler reports > these warnings: > > Warning (alias_paths): /aliases: aliases property name must include only > lowercase and '-' > > Fixed the node aliases to silence these warnings. > > Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> > --- This patch has been applied to fsl-qoriq master, awaiting upstream. --pk
diff --git a/board/freescale/ls1043aqds/eth.c b/board/freescale/ls1043aqds/eth.c index 8763913e31..e1919d2988 100644 --- a/board/freescale/ls1043aqds/eth.c +++ b/board/freescale/ls1043aqds/eth.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2015 Freescale Semiconductor, Inc. + * Copyright 2019 NXP */ #include <common.h> @@ -161,16 +162,16 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { if (port == FM1_DTSEC9) { fdt_set_phy_handle(fdt, compat, addr, - "sgmii_riser_s1_p1"); + "sgmii-riser-s1-p1"); } else if (port == FM1_DTSEC2) { fdt_set_phy_handle(fdt, compat, addr, - "sgmii_riser_s2_p1"); + "sgmii-riser-s2-p1"); } else if (port == FM1_DTSEC5) { fdt_set_phy_handle(fdt, compat, addr, - "sgmii_riser_s3_p1"); + "sgmii-riser-s3-p1"); } else if (port == FM1_DTSEC6) { fdt_set_phy_handle(fdt, compat, addr, - "sgmii_riser_s4_p1"); + "sgmii-riser-s4-p1"); } } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII_2500) { @@ -191,19 +192,19 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, switch (port) { case FM1_DTSEC1: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s1_p1"); + "qsgmii-s1-p1"); break; case FM1_DTSEC2: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s1_p2"); + "qsgmii-s1-p2"); break; case FM1_DTSEC5: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s1_p3"); + "qsgmii-s1-p3"); break; case FM1_DTSEC6: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s1_p4"); + "qsgmii-s1-p4"); break; default: break; @@ -213,19 +214,19 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, switch (port) { case FM1_DTSEC1: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s2_p1"); + "qsgmii-s2-p1"); break; case FM1_DTSEC2: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s2_p2"); + "qsgmii-s2-p2"); break; case FM1_DTSEC5: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s2_p3"); + "qsgmii-s2-p3"); break; case FM1_DTSEC6: fdt_set_phy_handle(fdt, compat, addr, - "qsgmii_s2_p4"); + "qsgmii-s2-p4"); break; default: break; @@ -268,16 +269,16 @@ void fdt_fixup_board_enet(void *fdt) case PHY_INTERFACE_MODE_QSGMII: switch (mdio_mux[i]) { case EMI1_SLOT1: - fdt_status_okay_by_alias(fdt, "emi1_slot1"); + fdt_status_okay_by_alias(fdt, "emi1-slot1"); break; case EMI1_SLOT2: - fdt_status_okay_by_alias(fdt, "emi1_slot2"); + fdt_status_okay_by_alias(fdt, "emi1-slot2"); break; case EMI1_SLOT3: - fdt_status_okay_by_alias(fdt, "emi1_slot3"); + fdt_status_okay_by_alias(fdt, "emi1-slot3"); break; case EMI1_SLOT4: - fdt_status_okay_by_alias(fdt, "emi1_slot4"); + fdt_status_okay_by_alias(fdt, "emi1-slot4"); break; default: break; diff --git a/board/freescale/ls1046aqds/eth.c b/board/freescale/ls1046aqds/eth.c index abe8ee95d4..1eb40677b5 100644 --- a/board/freescale/ls1046aqds/eth.c +++ b/board/freescale/ls1046aqds/eth.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018-2019 NXP */ #include <common.h> @@ -161,19 +161,19 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_SGMII) { switch (port) { case FM1_DTSEC9: - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p1"); + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p1"); break; case FM1_DTSEC10: - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p2"); + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p2"); break; case FM1_DTSEC5: - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p3"); + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p3"); break; case FM1_DTSEC6: - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s1_p4"); + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s1-p4"); break; case FM1_DTSEC2: - fdt_set_phy_handle(fdt, compat, addr, "sgmii_s4_p1"); + fdt_set_phy_handle(fdt, compat, addr, "sgmii-s4-p1"); break; default: break; @@ -193,16 +193,16 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr, } else if (fm_info_get_enet_if(port) == PHY_INTERFACE_MODE_QSGMII) { switch (port) { case FM1_DTSEC1: - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p4"); + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p4"); break; case FM1_DTSEC5: - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p2"); + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p2"); break; case FM1_DTSEC6: - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p1"); + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p1"); break; case FM1_DTSEC10: - fdt_set_phy_handle(fdt, compat, addr, "qsgmii_s2_p3"); + fdt_set_phy_handle(fdt, compat, addr, "qsgmii-s2-p3"); break; default: break; @@ -246,13 +246,13 @@ void fdt_fixup_board_enet(void *fdt) case PHY_INTERFACE_MODE_QSGMII: switch (mdio_mux[i]) { case EMI1_SLOT1: - fdt_status_okay_by_alias(fdt, "emi1_slot1"); + fdt_status_okay_by_alias(fdt, "emi1-slot1"); break; case EMI1_SLOT2: - fdt_status_okay_by_alias(fdt, "emi1_slot2"); + fdt_status_okay_by_alias(fdt, "emi1-slot2"); break; case EMI1_SLOT4: - fdt_status_okay_by_alias(fdt, "emi1_slot4"); + fdt_status_okay_by_alias(fdt, "emi1-slot4"); break; default: break;
when compiling dts file using DTC_FLAG='-@', the device tree compiler reports these warnings: Warning (alias_paths): /aliases: aliases property name must include only lowercase and '-' Fixed the node aliases to silence these warnings. Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com> --- board/freescale/ls1043aqds/eth.c | 33 +++++++++++++++--------------- board/freescale/ls1046aqds/eth.c | 26 +++++++++++------------ 2 files changed, 30 insertions(+), 29 deletions(-)