diff mbox

PATCH: Add -mavx2 and properly check numbers of mask bits

Message ID 20110807203537.GA27870@intel.com
State New
Headers show

Commit Message

H.J. Lu Aug. 7, 2011, 8:35 p.m. UTC 
Hi,

opth-gen.awk has

print "#define " mask name " (1 << " masknum[vname]++ ")"

and int has 32bits. We should check

if (masknum[var] > 32)

instead of

if (masknum[var] > 31)

Now, I got

#define OPTION_MASK_ISA_X32 (1 << 30)
#define OPTION_MASK_ISA_XOP (1 << 31)

in options.h.  OK for trunk?

Thanks.


H.J.
---
2011-08-07  H.J. Lu  <hongjiu.lu@intel.com>

	* opth-gen.awk: Properly check numbers of mask bits.

	* config/i386/i386.opt: Add mavx2.

Comments

Andreas Schwab Aug. 8, 2011, 5:29 p.m. UTC | #1 
"H.J. Lu" <hongjiu.lu@intel.com> writes:

> #define OPTION_MASK_ISA_XOP (1 << 31)

1 << 31 is undefined.

Andreas.
diff mbox

Patch

diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt
index f197dd8..3cfc812 100644
--- a/gcc/config/i386/i386.opt
+++ b/gcc/config/i386/i386.opt
@@ -457,6 +457,10 @@  mavx
 Target Report Mask(ISA_AVX) Var(ix86_isa_flags) Save
 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2 and AVX built-in functions and code generation
 
+mavx2
+Target Report Mask(ISA_AVX2) Var(ix86_isa_flags) Save
+Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and AVX2 built-in functions and code generation
+
 mfma
 Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save
 Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation
diff --git a/gcc/opth-gen.awk b/gcc/opth-gen.awk
index 876e0f6..5d156f5 100644
--- a/gcc/opth-gen.awk
+++ b/gcc/opth-gen.awk
@@ -311,7 +311,7 @@  for (i = 0; i < n_extra_masks; i++) {
 }
 
 for (var in masknum) {
-	if (masknum[var] > 31) {
+	if (masknum[var] > 32) {
 		if (var == "")
 			print "#error too many target masks"
 		else