| Message ID | 20190417201529.23953-1-marex@denx.de |
|---|---|
| State | Accepted |
| Commit | 8df653c32545171ecede4b740e38e8a4af4ed9eb |
| Delegated to: | Marek Vasut |
| Headers | show |
| Series | [U-Boot,1/4] ARM: socfpga: Factor out handoff register configuration | expand |
On 17.04.19 22:15, Marek Vasut wrote: > Factor out the code for programming preloader handoff register values, > the ISWGRP Handoff 0 and 1. These registers later control which bridges > are enabled by the "bridge" command on Gen5 devices. > > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Chin Liang See <chin.liang.see@intel.com> > Cc: Dinh Nguyen <dinguyen@kernel.org> > Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> > Cc: Tien Fong Chee <tien.fong.chee@intel.com> > --- > .../include/mach/reset_manager_gen5.h | 1 + > arch/arm/mach-socfpga/reset_manager_gen5.c | 25 +++++++++++++++++-- > 2 files changed, 24 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h > index dd58922cec..5e490d182e 100644 > --- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h > +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h > @@ -9,6 +9,7 @@ > #include <dt-bindings/reset/altr,rst-mgr.h> > > void reset_deassert_peripherals_handoff(void); > +void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h); > void socfpga_bridges_reset(int enable); > > struct socfpga_reset_manager { > diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c > index 25baef79bc..66af924485 100644 > --- a/arch/arm/mach-socfpga/reset_manager_gen5.c > +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c > @@ -73,6 +73,28 @@ void reset_deassert_peripherals_handoff(void) > #define L3REGS_REMAP_HPS2FPGA_MASK 0x08 > #define L3REGS_REMAP_OCRAM_MASK 0x01 > > +void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h) > +{ > + u32 brgmask = 0x0; > + u32 l3rmask = L3REGS_REMAP_OCRAM_MASK; > + > + if (h2f) > + brgmask |= BIT(0); > + else > + l3rmask |= L3REGS_REMAP_HPS2FPGA_MASK; > + > + if (lwh2f) > + brgmask |= BIT(1); > + else > + l3rmask |= L3REGS_REMAP_LWHPS2FPGA_MASK; > + > + if (f2h) > + brgmask |= BIT(2); > + > + writel(brgmask, &sysmgr_regs->iswgrp_handoff[0]); > + writel(l3rmask, &sysmgr_regs->iswgrp_handoff[1]); > +} > + > void socfpga_bridges_reset(int enable) > { > const u32 l3mask = L3REGS_REMAP_LWHPS2FPGA_MASK | 'l3mask' seems unused after this change, no? Other than that: Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> > @@ -83,8 +105,7 @@ void socfpga_bridges_reset(int enable) > /* brdmodrst */ > writel(0xffffffff, &reset_manager_base->brg_mod_reset); > } else { > - writel(0, &sysmgr_regs->iswgrp_handoff[0]); > - writel(l3mask, &sysmgr_regs->iswgrp_handoff[1]); > + socfpga_bridges_set_handoff_regs(false, false, false); > > /* Check signal from FPGA. */ > if (!fpgamgr_test_fpga_ready()) { >
On 4/19/19 9:47 PM, Simon Goldschmidt wrote: > > > On 17.04.19 22:15, Marek Vasut wrote: >> Factor out the code for programming preloader handoff register values, >> the ISWGRP Handoff 0 and 1. These registers later control which bridges >> are enabled by the "bridge" command on Gen5 devices. >> >> Signed-off-by: Marek Vasut <marex@denx.de> >> Cc: Chin Liang See <chin.liang.see@intel.com> >> Cc: Dinh Nguyen <dinguyen@kernel.org> >> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> >> Cc: Tien Fong Chee <tien.fong.chee@intel.com> >> --- >> .../include/mach/reset_manager_gen5.h | 1 + >> arch/arm/mach-socfpga/reset_manager_gen5.c | 25 +++++++++++++++++-- >> 2 files changed, 24 insertions(+), 2 deletions(-) >> >> diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h >> b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h >> index dd58922cec..5e490d182e 100644 >> --- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h >> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h >> @@ -9,6 +9,7 @@ >> #include <dt-bindings/reset/altr,rst-mgr.h> >> void reset_deassert_peripherals_handoff(void); >> +void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h); >> void socfpga_bridges_reset(int enable); >> struct socfpga_reset_manager { >> diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c >> b/arch/arm/mach-socfpga/reset_manager_gen5.c >> index 25baef79bc..66af924485 100644 >> --- a/arch/arm/mach-socfpga/reset_manager_gen5.c >> +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c >> @@ -73,6 +73,28 @@ void reset_deassert_peripherals_handoff(void) >> #define L3REGS_REMAP_HPS2FPGA_MASK 0x08 >> #define L3REGS_REMAP_OCRAM_MASK 0x01 >> +void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h) >> +{ >> + u32 brgmask = 0x0; >> + u32 l3rmask = L3REGS_REMAP_OCRAM_MASK; >> + >> + if (h2f) >> + brgmask |= BIT(0); >> + else >> + l3rmask |= L3REGS_REMAP_HPS2FPGA_MASK; >> + >> + if (lwh2f) >> + brgmask |= BIT(1); >> + else >> + l3rmask |= L3REGS_REMAP_LWHPS2FPGA_MASK; >> + >> + if (f2h) >> + brgmask |= BIT(2); >> + >> + writel(brgmask, &sysmgr_regs->iswgrp_handoff[0]); >> + writel(l3rmask, &sysmgr_regs->iswgrp_handoff[1]); >> +} >> + >> void socfpga_bridges_reset(int enable) >> { >> const u32 l3mask = L3REGS_REMAP_LWHPS2FPGA_MASK | > > 'l3mask' seems unused after this change, no? Nope, it's still used in the else {} branch of the conditional below. [...] >> @@ -83,8 +105,7 @@ void socfpga_bridges_reset(int enable) >> /* brdmodrst */ >> writel(0xffffffff, &reset_manager_base->brg_mod_reset); >> } else { >> - writel(0, &sysmgr_regs->iswgrp_handoff[0]); >> - writel(l3mask, &sysmgr_regs->iswgrp_handoff[1]); >> + socfpga_bridges_set_handoff_regs(false, false, false); >> /* Check signal from FPGA. */ >> if (!fpgamgr_test_fpga_ready()) { >>
Am 22.04.2019 um 19:59 schrieb Marek Vasut: > On 4/19/19 9:47 PM, Simon Goldschmidt wrote: >> >> >> On 17.04.19 22:15, Marek Vasut wrote: >>> Factor out the code for programming preloader handoff register values, >>> the ISWGRP Handoff 0 and 1. These registers later control which bridges >>> are enabled by the "bridge" command on Gen5 devices. >>> >>> Signed-off-by: Marek Vasut <marex@denx.de> >>> Cc: Chin Liang See <chin.liang.see@intel.com> >>> Cc: Dinh Nguyen <dinguyen@kernel.org> >>> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> >>> Cc: Tien Fong Chee <tien.fong.chee@intel.com> >>> --- >>> .../include/mach/reset_manager_gen5.h | 1 + >>> arch/arm/mach-socfpga/reset_manager_gen5.c | 25 +++++++++++++++++-- >>> 2 files changed, 24 insertions(+), 2 deletions(-) >>> >>> diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h >>> b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h >>> index dd58922cec..5e490d182e 100644 >>> --- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h >>> +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h >>> @@ -9,6 +9,7 @@ >>> #include <dt-bindings/reset/altr,rst-mgr.h> >>> void reset_deassert_peripherals_handoff(void); >>> +void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h); >>> void socfpga_bridges_reset(int enable); >>> struct socfpga_reset_manager { >>> diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c >>> b/arch/arm/mach-socfpga/reset_manager_gen5.c >>> index 25baef79bc..66af924485 100644 >>> --- a/arch/arm/mach-socfpga/reset_manager_gen5.c >>> +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c >>> @@ -73,6 +73,28 @@ void reset_deassert_peripherals_handoff(void) >>> #define L3REGS_REMAP_HPS2FPGA_MASK 0x08 >>> #define L3REGS_REMAP_OCRAM_MASK 0x01 >>> +void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h) >>> +{ >>> + u32 brgmask = 0x0; >>> + u32 l3rmask = L3REGS_REMAP_OCRAM_MASK; >>> + >>> + if (h2f) >>> + brgmask |= BIT(0); >>> + else >>> + l3rmask |= L3REGS_REMAP_HPS2FPGA_MASK; >>> + >>> + if (lwh2f) >>> + brgmask |= BIT(1); >>> + else >>> + l3rmask |= L3REGS_REMAP_LWHPS2FPGA_MASK; >>> + >>> + if (f2h) >>> + brgmask |= BIT(2); >>> + >>> + writel(brgmask, &sysmgr_regs->iswgrp_handoff[0]); >>> + writel(l3rmask, &sysmgr_regs->iswgrp_handoff[1]); >>> +} >>> + >>> void socfpga_bridges_reset(int enable) >>> { >>> const u32 l3mask = L3REGS_REMAP_LWHPS2FPGA_MASK | >> >> 'l3mask' seems unused after this change, no? > > Nope, it's still used in the else {} branch of the conditional below. Oops, missed that. In that case: Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> > > [...] > >>> @@ -83,8 +105,7 @@ void socfpga_bridges_reset(int enable) >>> /* brdmodrst */ >>> writel(0xffffffff, &reset_manager_base->brg_mod_reset); >>> } else { >>> - writel(0, &sysmgr_regs->iswgrp_handoff[0]); >>> - writel(l3mask, &sysmgr_regs->iswgrp_handoff[1]); >>> + socfpga_bridges_set_handoff_regs(false, false, false); >>> /* Check signal from FPGA. */ >>> if (!fpgamgr_test_fpga_ready()) { >>> > >
diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h index dd58922cec..5e490d182e 100644 --- a/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h +++ b/arch/arm/mach-socfpga/include/mach/reset_manager_gen5.h @@ -9,6 +9,7 @@ #include <dt-bindings/reset/altr,rst-mgr.h> void reset_deassert_peripherals_handoff(void); +void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h); void socfpga_bridges_reset(int enable); struct socfpga_reset_manager { diff --git a/arch/arm/mach-socfpga/reset_manager_gen5.c b/arch/arm/mach-socfpga/reset_manager_gen5.c index 25baef79bc..66af924485 100644 --- a/arch/arm/mach-socfpga/reset_manager_gen5.c +++ b/arch/arm/mach-socfpga/reset_manager_gen5.c @@ -73,6 +73,28 @@ void reset_deassert_peripherals_handoff(void) #define L3REGS_REMAP_HPS2FPGA_MASK 0x08 #define L3REGS_REMAP_OCRAM_MASK 0x01 +void socfpga_bridges_set_handoff_regs(bool h2f, bool lwh2f, bool f2h) +{ + u32 brgmask = 0x0; + u32 l3rmask = L3REGS_REMAP_OCRAM_MASK; + + if (h2f) + brgmask |= BIT(0); + else + l3rmask |= L3REGS_REMAP_HPS2FPGA_MASK; + + if (lwh2f) + brgmask |= BIT(1); + else + l3rmask |= L3REGS_REMAP_LWHPS2FPGA_MASK; + + if (f2h) + brgmask |= BIT(2); + + writel(brgmask, &sysmgr_regs->iswgrp_handoff[0]); + writel(l3rmask, &sysmgr_regs->iswgrp_handoff[1]); +} + void socfpga_bridges_reset(int enable) { const u32 l3mask = L3REGS_REMAP_LWHPS2FPGA_MASK | @@ -83,8 +105,7 @@ void socfpga_bridges_reset(int enable) /* brdmodrst */ writel(0xffffffff, &reset_manager_base->brg_mod_reset); } else { - writel(0, &sysmgr_regs->iswgrp_handoff[0]); - writel(l3mask, &sysmgr_regs->iswgrp_handoff[1]); + socfpga_bridges_set_handoff_regs(false, false, false); /* Check signal from FPGA. */ if (!fpgamgr_test_fpga_ready()) {
Factor out the code for programming preloader handoff register values, the ISWGRP Handoff 0 and 1. These registers later control which bridges are enabled by the "bridge" command on Gen5 devices. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <chin.liang.see@intel.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com> --- .../include/mach/reset_manager_gen5.h | 1 + arch/arm/mach-socfpga/reset_manager_gen5.c | 25 +++++++++++++++++-- 2 files changed, 24 insertions(+), 2 deletions(-)