[RFC,V1,3/6] dt-bindings: mt8183: Added DIP dt-bindings
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Message ID 20190417104511.21514-4-frederic.chen@mediatek.com
State Changes Requested
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  • media: platform: Add support for Digital Image Processing (DIP) on mt8183 SoC
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Commit Message

Frederic Chen April 17, 2019, 10:45 a.m. UTC
This patch adds DT binding documentation for the Digital Image
Processing (DIP) unit of camera ISP system on Mediatek's SoCs.

Signed-off-by: Frederic Chen <frederic.chen@mediatek.com>
---
 .../bindings/media/mediatek,mt8183-dip.txt    | 35 +++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt

Comments

Rob Herring April 30, 2019, 1:16 a.m. UTC | #1
On Wed, Apr 17, 2019 at 06:45:08PM +0800, Frederic Chen wrote:
> This patch adds DT binding documentation for the Digital Image
> Processing (DIP) unit of camera ISP system on Mediatek's SoCs.
> 
> Signed-off-by: Frederic Chen <frederic.chen@mediatek.com>
> ---
>  .../bindings/media/mediatek,mt8183-dip.txt    | 35 +++++++++++++++++++
>  1 file changed, 35 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
> 
> diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
> new file mode 100644
> index 000000000000..0e1994bf82f0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
> @@ -0,0 +1,35 @@
> +* Mediatek Digital Image Processor (DIP)
> +
> +Digital Image Processor (DIP) unit in Mediatek ISP system is responsible for
> +image content adjustment according to the tuning parameters. DIP can process
> +the image form memory buffer and output the processed image to multiple output
> +buffers. Furthermore, it can support demosaicing and noise reduction on the
> +images.
> +
> +Required properties:
> +- compatible: "mediatek,mt8183-dip"
> +- reg: Physical base address and length of the function block register space
> +- interrupts: interrupt number to the cpu
> +- iommus: should point to the respective IOMMU block with master port as
> +  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> +  for details.
> +- mediatek,larb: must contain the local arbiters in the current Socs, see
> +  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> +  for details.
> +- clocks: must contain the local arbiters 5 (LARB5) and DIP clock
> +- clock-names: must contain DIP_CG_IMG_LARB5 and DIP_CG_IMG_DIP
> +
> +Example:
> +	dip: dip@15022000 {
> +		compatible = "mediatek,mt8183-dip";
> +		mediatek,larb = <&larb5>;

> +		mediatek,mdp3 = <&mdp_rdma0>;
> +		mediatek,vpu = <&vpu>;

Not documented.

> +		iommus = <&iommu M4U_PORT_CAM_IMGI>;
> +		reg = <0 0x15022000 0 0x6000>;
> +		interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_LOW>;
> +		clocks = <&imgsys CLK_IMG_LARB5>,
> +			 <&imgsys CLK_IMG_DIP>;
> +		clock-names = "DIP_CG_IMG_LARB5",
> +			      "DIP_CG_IMG_DIP";
> +	};
> -- 
> 2.18.0
>
Frederic Chen May 7, 2019, 2:16 p.m. UTC | #2
Dear Rob,

I appreciate your comments.

On Mon, 2019-04-29 at 20:16 -0500, Rob Herring wrote:
> On Wed, Apr 17, 2019 at 06:45:08PM +0800, Frederic Chen wrote:
> > This patch adds DT binding documentation for the Digital Image
> > Processing (DIP) unit of camera ISP system on Mediatek's SoCs.
> > 
> > Signed-off-by: Frederic Chen <frederic.chen@mediatek.com>
> > ---
> >  .../bindings/media/mediatek,mt8183-dip.txt    | 35 +++++++++++++++++++
> >  1 file changed, 35 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
> > 
> > diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
> > new file mode 100644
> > index 000000000000..0e1994bf82f0
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
> > @@ -0,0 +1,35 @@
> > +* Mediatek Digital Image Processor (DIP)
> > +
> > +Digital Image Processor (DIP) unit in Mediatek ISP system is responsible for
> > +image content adjustment according to the tuning parameters. DIP can process
> > +the image form memory buffer and output the processed image to multiple output
> > +buffers. Furthermore, it can support demosaicing and noise reduction on the
> > +images.
> > +
> > +Required properties:
> > +- compatible: "mediatek,mt8183-dip"
> > +- reg: Physical base address and length of the function block register space
> > +- interrupts: interrupt number to the cpu
> > +- iommus: should point to the respective IOMMU block with master port as
> > +  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> > +  for details.
> > +- mediatek,larb: must contain the local arbiters in the current Socs, see
> > +  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> > +  for details.
> > +- clocks: must contain the local arbiters 5 (LARB5) and DIP clock
> > +- clock-names: must contain DIP_CG_IMG_LARB5 and DIP_CG_IMG_DIP
> > +
> > +Example:
> > +	dip: dip@15022000 {
> > +		compatible = "mediatek,mt8183-dip";
> > +		mediatek,larb = <&larb5>;
> 
> > +		mediatek,mdp3 = <&mdp_rdma0>;
> > +		mediatek,vpu = <&vpu>;
> 
> Not documented.
> 

“mediatek,vpu” will be replaced by “mediatek,scp.” I would like to 
add the following description in next version of the patch:

- mediatek,scp: must point to the scp block of the co-processor used
  with DIP. Please see
  Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for the
  detail.

- mediatek,mdp3: must point to the Media Data Path 3 (MDP3) block.
  Please see
  Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt
  for the detail.

Example:

	mdp_rdma0: mdp_rdma0@14001000 {
		compatible = "mediatek,mt8183-mdp-rdma",
			     "mediatek,mt8183-mdp3";
		mediatek,vpu = <&vpu>;
		mediatek,scp = <&scp>;
		mediatek,mdp-id = <0>;
		/* ...... */
		};

	scp: scp@10500000 {
		compatible = "mediatek,mt8183-scp";
		reg = <0 0x10500000 0 0x80000>,
		      <0 0x105c0000 0 0x5000>;
		reg-names = "sram", "cfg";
		interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&infracfg CLK_INFRA_SCPSYS>;
		clock-names = "main";
		memory-region = <&scp_mem_reserved>;
		status = "okay";
	};

	dip: dip@15022000 {
		compatible = "mediatek,mt8183-dip";
		mediatek,larb = <&larb5>;
		mediatek,mdp3 = <&mdp_rdma0>;
		mediatek,scp = <&scp>;
		/* ...... */
	};


The dependent Mediatek SCP and MDP3 patch have been sent:
[1] Mediatek SCP, https://patchwork.kernel.org/patch/10897319/
[2] Meidatek MDP3, https://patchwork.kernel.org/patch/10844229/

> > +		iommus = <&iommu M4U_PORT_CAM_IMGI>;
> > +		reg = <0 0x15022000 0 0x6000>;
> > +		interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_LOW>;
> > +		clocks = <&imgsys CLK_IMG_LARB5>,
> > +			 <&imgsys CLK_IMG_DIP>;
> > +		clock-names = "DIP_CG_IMG_LARB5",
> > +			      "DIP_CG_IMG_DIP";
> > +	};
> > -- 
> > 2.18.0
> > 

Sincerely,

Frederic Chen
Rob Herring May 14, 2019, 4:14 p.m. UTC | #3
On Tue, May 7, 2019 at 9:16 AM Frederic Chen <frederic.chen@mediatek.com> wrote:
>
> Dear Rob,
>
> I appreciate your comments.
>
> On Mon, 2019-04-29 at 20:16 -0500, Rob Herring wrote:
> > On Wed, Apr 17, 2019 at 06:45:08PM +0800, Frederic Chen wrote:
> > > This patch adds DT binding documentation for the Digital Image
> > > Processing (DIP) unit of camera ISP system on Mediatek's SoCs.
> > >
> > > Signed-off-by: Frederic Chen <frederic.chen@mediatek.com>
> > > ---
> > >  .../bindings/media/mediatek,mt8183-dip.txt    | 35 +++++++++++++++++++
> > >  1 file changed, 35 insertions(+)
> > >  create mode 100644 Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
> > >
> > > diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
> > > new file mode 100644
> > > index 000000000000..0e1994bf82f0
> > > --- /dev/null
> > > +++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
> > > @@ -0,0 +1,35 @@
> > > +* Mediatek Digital Image Processor (DIP)
> > > +
> > > +Digital Image Processor (DIP) unit in Mediatek ISP system is responsible for
> > > +image content adjustment according to the tuning parameters. DIP can process
> > > +the image form memory buffer and output the processed image to multiple output
> > > +buffers. Furthermore, it can support demosaicing and noise reduction on the
> > > +images.
> > > +
> > > +Required properties:
> > > +- compatible: "mediatek,mt8183-dip"
> > > +- reg: Physical base address and length of the function block register space
> > > +- interrupts: interrupt number to the cpu
> > > +- iommus: should point to the respective IOMMU block with master port as
> > > +  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
> > > +  for details.
> > > +- mediatek,larb: must contain the local arbiters in the current Socs, see
> > > +  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
> > > +  for details.
> > > +- clocks: must contain the local arbiters 5 (LARB5) and DIP clock
> > > +- clock-names: must contain DIP_CG_IMG_LARB5 and DIP_CG_IMG_DIP
> > > +
> > > +Example:
> > > +   dip: dip@15022000 {
> > > +           compatible = "mediatek,mt8183-dip";
> > > +           mediatek,larb = <&larb5>;
> >
> > > +           mediatek,mdp3 = <&mdp_rdma0>;
> > > +           mediatek,vpu = <&vpu>;
> >
> > Not documented.
> >
>
> “mediatek,vpu” will be replaced by “mediatek,scp.” I would like to
> add the following description in next version of the patch:
>
> - mediatek,scp: must point to the scp block of the co-processor used
>   with DIP. Please see
>   Documentation/devicetree/bindings/remoteproc/mtk,scp.txt for the
>   detail.
>
> - mediatek,mdp3: must point to the Media Data Path 3 (MDP3) block.
>   Please see
>   Documentation/devicetree/bindings/media/mediatek,mt8183-mdp3.txt
>   for the detail.

If there's only 1 of each of these blocks, there's no need to have
phandle. Just find the matching node using the compatible string(s).

Rob

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
new file mode 100644
index 000000000000..0e1994bf82f0
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek,mt8183-dip.txt
@@ -0,0 +1,35 @@ 
+* Mediatek Digital Image Processor (DIP)
+
+Digital Image Processor (DIP) unit in Mediatek ISP system is responsible for
+image content adjustment according to the tuning parameters. DIP can process
+the image form memory buffer and output the processed image to multiple output
+buffers. Furthermore, it can support demosaicing and noise reduction on the
+images.
+
+Required properties:
+- compatible: "mediatek,mt8183-dip"
+- reg: Physical base address and length of the function block register space
+- interrupts: interrupt number to the cpu
+- iommus: should point to the respective IOMMU block with master port as
+  argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
+  for details.
+- mediatek,larb: must contain the local arbiters in the current Socs, see
+  Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
+  for details.
+- clocks: must contain the local arbiters 5 (LARB5) and DIP clock
+- clock-names: must contain DIP_CG_IMG_LARB5 and DIP_CG_IMG_DIP
+
+Example:
+	dip: dip@15022000 {
+		compatible = "mediatek,mt8183-dip";
+		mediatek,larb = <&larb5>;
+		mediatek,mdp3 = <&mdp_rdma0>;
+		mediatek,vpu = <&vpu>;
+		iommus = <&iommu M4U_PORT_CAM_IMGI>;
+		reg = <0 0x15022000 0 0x6000>;
+		interrupts = <GIC_SPI 268 IRQ_TYPE_LEVEL_LOW>;
+		clocks = <&imgsys CLK_IMG_LARB5>,
+			 <&imgsys CLK_IMG_DIP>;
+		clock-names = "DIP_CG_IMG_LARB5",
+			      "DIP_CG_IMG_DIP";
+	};