[V5,3/4] arm64: dts: imx8qxp: added ddr performance monitor nodes
diff mbox series

Message ID 1555447156-28306-3-git-send-email-Frank.Li@nxp.com
State Superseded
Headers show
Series
  • [V5,1/4] dt-bindings: perf: imx8-ddr: add imx8qxp ddr performance monitor
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Checks

Context Check Description
robh/checkpatch warning "total: 0 errors, 1 warnings, 13 lines checked"

Commit Message

Frank Li April 16, 2019, 8:39 p.m. UTC
Add ddr performance monitor

Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
---
Change from v3 to v5
* none

Change from v2 to v3
* ddr_pmu0 -> ddr-pmu

 arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

Patch
diff mbox series

diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index 0683ee2..16f2588 100644
--- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
@@ -110,6 +110,13 @@ 
 		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	ddr-pmu@5c020000 {
+		compatible = "fsl,imx8-ddr-pmu";
+		reg = <0x0 0x5c020000 0x0 0x10000>;
+		interrupt-parent = <&gic>;
+		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+	};
+
 	psci {
 		compatible = "arm,psci-1.0";
 		method = "smc";