| Message ID | 20190413020111.23400-2-paul.walmsley@sifive.com |
|---|---|
| State | Not Applicable, archived |
| Headers | show |
| Series | [v5,1/2] dt-bindings: serial: add documentation for the SiFive UART driver | expand |
| Context | Check | Description |
|---|---|---|
| robh/checkpatch | success |
On Fri, Apr 12, 2019 at 9:01 PM Paul Walmsley <paul.walmsley@sifive.com> wrote: > > Add DT binding documentation for the Linux driver for the SiFive > asynchronous serial IP block. > > This revision incorporates changes based on feedback from Rob > Herring <robh@kernel.org>. > > Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> > Signed-off-by: Paul Walmsley <paul@pwsan.com> > Cc: linux-serial@vger.kernel.org > Cc: devicetree@vger.kernel.org > Cc: linux-riscv@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Mark Rutland <mark.rutland@arm.com> > Cc: Palmer Dabbelt <palmer@sifive.com> > --- > .../bindings/serial/sifive-serial.txt | 33 +++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt Reviewed-by: Rob Herring <robh@kernel.org> However, what about flow-control configuration? You'd better think now about what the default is and overriding that. Rob
On Fri, 26 Apr 2019, Rob Herring wrote: > On Fri, Apr 12, 2019 at 9:01 PM Paul Walmsley <paul.walmsley@sifive.com> wrote: > > > > Add DT binding documentation for the Linux driver for the SiFive > > asynchronous serial IP block. > > > > This revision incorporates changes based on feedback from Rob > > Herring <robh@kernel.org>. > > > > Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> > > Signed-off-by: Paul Walmsley <paul@pwsan.com> > > Cc: linux-serial@vger.kernel.org > > Cc: devicetree@vger.kernel.org > > Cc: linux-riscv@lists.infradead.org > > Cc: linux-kernel@vger.kernel.org > > Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Mark Rutland <mark.rutland@arm.com> > > Cc: Palmer Dabbelt <palmer@sifive.com> > > --- > > .../bindings/serial/sifive-serial.txt | 33 +++++++++++++++++++ > > 1 file changed, 33 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/serial/sifive-serial.txt > > Reviewed-by: Rob Herring <robh@kernel.org> Thanks Rob. > However, what about flow-control configuration? You'd better think now > about what the default is and overriding that. The underlying IP doesn't support it. https://github.com/sifive/riscv-linux/blob/dev/paulw/dts-v5.1-rc6-experimental/drivers/tty/serial/sifive.c#L30 - Paul
diff --git a/Documentation/devicetree/bindings/serial/sifive-serial.txt b/Documentation/devicetree/bindings/serial/sifive-serial.txt new file mode 100644 index 000000000000..c86b1e524159 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/sifive-serial.txt @@ -0,0 +1,33 @@ +SiFive asynchronous serial interface (UART) + +Required properties: + +- compatible: should be something similar to + "sifive,<chip>-uart" for the UART as integrated + on a particular chip, and "sifive,uart<version>" for the + general UART IP block programming model. Supported + compatible strings as of the date of this writing are: + "sifive,fu540-c000-uart" for the SiFive UART v0 as + integrated onto the SiFive FU540 chip, or "sifive,uart0" + for the SiFive UART v0 IP block with no chip integration + tweaks (if any) +- reg: address and length of the register space +- interrupts: Should contain the UART interrupt identifier +- clocks: Should contain a clock identifier for the UART's parent clock + + +UART HDL that corresponds to the IP block version numbers can be found +here: + +https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/uart + + +Example: + +uart0: serial@10010000 { + compatible = "sifive,fu540-c000-uart", "sifive,uart0"; + interrupt-parent = <&plic0>; + interrupts = <80>; + reg = <0x0 0x10010000 0x0 0x1000>; + clocks = <&prci PRCI_CLK_TLCLK>; +};