| Message ID | 20190410103926.8781-2-alexandre.belloni@bootlin.com |
|---|---|
| State | New |
| Headers | show |
| Series | gpio: lpc32xx: enable interrupts for port 3 | expand |
Hi Alexandre, thanks for your patch! On Wed, Apr 10, 2019 at 12:39 PM Alexandre Belloni <alexandre.belloni@bootlin.com> wrote: > Some of the LPC32xx gpios are wired directly to one of the interrupt > controllers while port 0 and port 1 share the same interrupt for their > interrupt capable gpios. > > Cc: Rob Herring <robh+dt@kernel.org> > Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> (...) > +- interrupts: Should be the interrupt shared by port 0 and port 1 and the > + interrupts for individual pins from port 3. > +- interrupt-names : Should be the names of irq resources. The shared port > + interrupt is named "p01", the other use the pin names. The recent design pattern with hierarchical interrupts such as this one is to simply hardcode the relationship between parent interrupt controller and child interrupt controller in the driver. However you should add interrupt-controller and possibly interrupt-parent to the bindings and example. More comments in patch 2. Yours, Linus Walleij
diff --git a/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt b/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt index 49819367a011..e7957a17e4db 100644 --- a/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt +++ b/Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt @@ -16,6 +16,10 @@ Required properties: 3) optional parameters: - bit 0 specifies polarity (0 for normal, 1 for inverted) - reg: Index of the GPIO group +- interrupts: Should be the interrupt shared by port 0 and port 1 and the + interrupts for individual pins from port 3. +- interrupt-names : Should be the names of irq resources. The shared port + interrupt is named "p01", the other use the pin names. Example:
Some of the LPC32xx gpios are wired directly to one of the interrupt controllers while port 0 and port 1 share the same interrupt for their interrupt capable gpios. Cc: Rob Herring <robh+dt@kernel.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> --- Documentation/devicetree/bindings/gpio/gpio_lpc32xx.txt | 4 ++++ 1 file changed, 4 insertions(+)