From patchwork Mon Aug 1 18:59:38 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 107791 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 63F6CB6F90 for ; Tue, 2 Aug 2011 05:00:00 +1000 (EST) Received: (qmail 15322 invoked by alias); 1 Aug 2011 18:59:59 -0000 Received: (qmail 15313 invoked by uid 22791); 1 Aug 2011 18:59:58 -0000 X-SWARE-Spam-Status: No, hits=-6.7 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, SPF_HELO_PASS X-Spam-Check-By: sourceware.org Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 01 Aug 2011 18:59:39 +0000 Received: from int-mx10.intmail.prod.int.phx2.redhat.com (int-mx10.intmail.prod.int.phx2.redhat.com [10.5.11.23]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id p71Ixc2d024579 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Mon, 1 Aug 2011 14:59:38 -0400 Received: from anchor.twiddle.net (vpn-227-151.phx2.redhat.com [10.3.227.151]) by int-mx10.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id p71Ixc3X005464 for ; Mon, 1 Aug 2011 14:59:38 -0400 Message-ID: <4E36F79A.2060108@redhat.com> Date: Mon, 01 Aug 2011 11:59:38 -0700 From: Richard Henderson User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:5.0) Gecko/20110707 Thunderbird/5.0 MIME-Version: 1.0 To: GCC Patches Subject: Fwd: [AVR] Fix PR49881 References: <4E36F758.90602@redhat.com> In-Reply-To: <4E36F758.90602@redhat.com> X-Forwarded-Message-Id: <4E36F758.90602@redhat.com> X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Dang, forgot to add gcc-patches... -------- Original Message -------- Subject: [AVR] Fix PR49881 Date: Mon, 01 Aug 2011 11:58:32 -0700 From: Richard Henderson To: Denis Chertykov , eric.weddington@atmel.com CC: avr@gjlay.de The following iteration fixes the two regressions reported in comment 7 of the PR. These were ICEs due to emit_push_insn_single being "helpful" with pushing complex numbers. Instead of recursing for the components of a complex number, it simply generated raw pre_dec patterns. This is arguably a middle-end bug, but it's easier to fix in the backend by listing complex modes in the macro for the push expander. Ok? r~ * config/avr/avr.h (PUSH_ROUNDING): New. * config/avr/avr.md (pushqi1): Rename from *pushqi. (*pushhi, *pushsi, *pushsf): Remove. (MPUSH): New mode iterator. (push1): New expander. diff --git a/gcc/config/avr/avr.h b/gcc/config/avr/avr.h index ddd30d6..6a80693 100644 --- a/gcc/config/avr/avr.h +++ b/gcc/config/avr/avr.h @@ -665,3 +665,7 @@ struct GTY(()) machine_function /* 'true' if a callee might be tail called */ int sibcall_fails; }; + +/* AVR does not round pushes, but the existance of this macro is + required in order for pushes to be generated. */ +#define PUSH_ROUNDING(X) (X) diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index 55a883e..f60f9f0 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -202,8 +202,7 @@ DONE; }) - -(define_insn "*pushqi" +(define_insn "pushqi1" [(set (mem:QI (post_dec:HI (reg:HI REG_SP))) (match_operand:QI 0 "reg_or_0_operand" "r,L"))] "" @@ -212,33 +211,29 @@ push __zero_reg__" [(set_attr "length" "1,1")]) -(define_insn "*pushhi" - [(set (mem:HI (post_dec:HI (reg:HI REG_SP))) - (match_operand:HI 0 "reg_or_0_operand" "r,L"))] - "" - "@ - push %B0\;push %A0 - push __zero_reg__\;push __zero_reg__" - [(set_attr "length" "2,2")]) +;; All modes for a multi-byte push. We must include complex modes here too, +;; lest emit_single_push_insn "helpfully " create the auto-inc itself. +(define_mode_iterator MPUSH + [(CQI "") + (HI "") (CHI "") + (SI "") (CSI "") + (DI "") (CDI "") + (SF "") (SC "")]) -(define_insn "*pushsi" - [(set (mem:SI (post_dec:HI (reg:HI REG_SP))) - (match_operand:SI 0 "reg_or_0_operand" "r,L"))] +(define_expand "push1" + [(match_operand:MPUSH 0 "general_operand" "")] "" - "@ - push %D0\;push %C0\;push %B0\;push %A0 - push __zero_reg__\;push __zero_reg__\;push __zero_reg__\;push __zero_reg__" - [(set_attr "length" "4,4")]) - -(define_insn "*pushsf" - [(set (mem:SF (post_dec:HI (reg:HI REG_SP))) - (match_operand:SF 0 "register_operand" "r"))] - "" - "push %D0 - push %C0 - push %B0 - push %A0" - [(set_attr "length" "4")]) +{ + int i; + for (i = GET_MODE_SIZE (mode) - 1; i >= 0; --i) + { + rtx part = simplify_gen_subreg (QImode, operands[0], mode, i); + if (part != const0_rtx) + part = force_reg (QImode, part); + emit_insn (gen_pushqi1 (part)); + } + DONE; +}) ;;======================================================================== ;; move byte