| Message ID | 1554407683-31580-8-git-send-email-vidyas@nvidia.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add Tegra194 PCIe support | expand |
On Fri, Apr 05, 2019 at 01:24:34AM +0530, Vidya Sagar wrote: > Add support to enable CDM (Configuration Dependent Module) registers check > for any data corruption. CDM registers include standard PCIe configuration > space registers, Port Logic registers and iATU and DMA registers. > Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook > Version 4.90a > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > Changes since [v1]: > * This is a new patch in v2 series > > Documentation/devicetree/bindings/pci/designware-pcie.txt | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt > index c124f9bc11f3..728281b5bcd5 100644 > --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt > +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt > @@ -31,6 +31,10 @@ Optional properties: > - clock-names: Must include the following entries: > - "pcie" > - "pcie_bus" > +- cdm-check: This is a boolean property and if present enables automatic > + checking of CDM (Configuration Dependent Module) registers for data > + corruption. CDM registers include configuration space registers and iATU > + (internal Address Translation Unit) registers. By comparison the commit message also lists "Port Logic" and "DMA" registers as being part of the CDM registers. Shouldn't they be part of the bindings document as well? Perhaps it'd also be a good idea to rename this property to something more imperative, like "enable-cdm" or similar. Thierry > RC mode: > - num-viewport: number of view ports configured in hardware. If a platform > does not specify it, the driver assumes 2. > -- > 2.7.4 >
On 4/15/2019 8:24 PM, Thierry Reding wrote: > On Fri, Apr 05, 2019 at 01:24:34AM +0530, Vidya Sagar wrote: >> Add support to enable CDM (Configuration Dependent Module) registers check >> for any data corruption. CDM registers include standard PCIe configuration >> space registers, Port Logic registers and iATU and DMA registers. >> Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook >> Version 4.90a >> >> Signed-off-by: Vidya Sagar <vidyas@nvidia.com> >> --- >> Changes since [v1]: >> * This is a new patch in v2 series >> >> Documentation/devicetree/bindings/pci/designware-pcie.txt | 4 ++++ >> 1 file changed, 4 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt >> index c124f9bc11f3..728281b5bcd5 100644 >> --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt >> +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt >> @@ -31,6 +31,10 @@ Optional properties: >> - clock-names: Must include the following entries: >> - "pcie" >> - "pcie_bus" >> +- cdm-check: This is a boolean property and if present enables automatic >> + checking of CDM (Configuration Dependent Module) registers for data >> + corruption. CDM registers include configuration space registers and iATU >> + (internal Address Translation Unit) registers. > > By comparison the commit message also lists "Port Logic" and "DMA" > registers as being part of the CDM registers. Shouldn't they be part of > the bindings document as well? Ok. I'll add them in V3 patch series. > > Perhaps it'd also be a good idea to rename this property to something > more imperative, like "enable-cdm" or similar. Ok. I'll go with "enable-cdm-check". I hope that should be fine. > > Thierry > >> RC mode: >> - num-viewport: number of view ports configured in hardware. If a platform >> does not specify it, the driver assumes 2. >> -- >> 2.7.4 >>
diff --git a/Documentation/devicetree/bindings/pci/designware-pcie.txt b/Documentation/devicetree/bindings/pci/designware-pcie.txt index c124f9bc11f3..728281b5bcd5 100644 --- a/Documentation/devicetree/bindings/pci/designware-pcie.txt +++ b/Documentation/devicetree/bindings/pci/designware-pcie.txt @@ -31,6 +31,10 @@ Optional properties: - clock-names: Must include the following entries: - "pcie" - "pcie_bus" +- cdm-check: This is a boolean property and if present enables automatic + checking of CDM (Configuration Dependent Module) registers for data + corruption. CDM registers include configuration space registers and iATU + (internal Address Translation Unit) registers. RC mode: - num-viewport: number of view ports configured in hardware. If a platform does not specify it, the driver assumes 2.
Add support to enable CDM (Configuration Dependent Module) registers check for any data corruption. CDM registers include standard PCIe configuration space registers, Port Logic registers and iATU and DMA registers. Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook Version 4.90a Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- Changes since [v1]: * This is a new patch in v2 series Documentation/devicetree/bindings/pci/designware-pcie.txt | 4 ++++ 1 file changed, 4 insertions(+)