Patchwork [U-Boot,v2] arm/kirkwood: print speeds with cpu info.

login
register
mail settings
Submitter u-boot@lakedaemon.net
Date Aug. 1, 2011, 1:04 a.m.
Message ID <1312160667-14248-1-git-send-email-u-boot@lakedaemon.net>
Download mbox | patch
Permalink /patch/107652/
State Changes Requested
Delegated to: Prafulla Wadaskar
Headers show

Comments

u-boot@lakedaemon.net - Aug. 1, 2011, 1:04 a.m.
If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print the
speeds of the various components.

Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
---
Changes since v1:
	- optimized macros to remove one-timers
	- reduced switch/case to if/else since it operates on one bit.
	- remove RFC

 arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41 ++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
 2 files changed, 42 insertions(+), 0 deletions(-)
Simon Guinot - Aug. 1, 2011, 12:20 p.m.
Hi Jason,

On Mon, Aug 01, 2011 at 01:04:27AM +0000, Jason Cooper wrote:
> If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print the
> speeds of the various components.
> 
> Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
> ---
> Changes since v1:
> 	- optimized macros to remove one-timers
> 	- reduced switch/case to if/else since it operates on one bit.
> 	- remove RFC
> 
>  arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41 ++++++++++++++++++++++++++++++
>  arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
>  2 files changed, 42 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> index b4a4c04..818c82f 100644
> --- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> +++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> @@ -270,11 +270,28 @@ static void kw_sysrst_check(void)
>  }
>  
>  #if defined(CONFIG_DISPLAY_CPUINFO)
> +#define MSAR_CPUCLCK_EXTRACT(X)	(((X & 0x2) >> 1) | ((X & 0x400000) >> 21) | \
> +				((X & 0x18) >> 1))
> +#define MSAR_L2CLCK_EXTRACT(X)  (((X & 0x600) >> 9) | ((X & 0x80000) >> 17))
> +#define MSAR_DDRCLCK_RTIO_MASK  (0xf << 5)
> +
> +/*
> + * TCCLK bit:
> + *   1 = 166 MHz
> + *   0 = 200 MHz
> + */
> +#define MSAR_TCLCK_MASK		0x00200000
> +#define MV_BOARD_TCLK_166MHZ	166666667
> +#define MV_BOARD_TCLK_200MHZ	200000000
> +
>  int print_cpuinfo(void)
>  {
>  	char *rev;
>  	u16 devid = (readl(KW_REG_PCIE_DEVID) >> 16) & 0xffff;
>  	u8 revid = readl(KW_REG_PCIE_REVID) & 0xff;
> +	u32 cpu_clk, t_clk, tmp;
> +	u32 sys_clk, l2_clk;
> +	u32 l2_ratio, ddr_ratio;
>  
>  	if ((readl(KW_REG_DEVICE_ID) & 0x03) > 2) {
>  		printf("Error.. %s:Unsupported Kirkwood SoC 88F%04x\n", __FUNCTION__, devid);
> @@ -297,6 +314,30 @@ int print_cpuinfo(void)
>  	}
>  
>  	printf("SoC:   Kirkwood 88F%04x_%s\n", devid, rev);
> +
> +	tmp = readl(MPP_SAMPLE_AT_RESET);
> +	cpu_clk = MSAR_CPUCLCK_EXTRACT(tmp);
> +	if (cpu_clk == 0x9)
> +		cpu_clk = 1200;
> +

I suspect this code to be broken. Here you get a clock selector (which
is only relevant for 6281 and 6191 SoCs) from the reset at sample
register.

Which clock frequency do you pick if the selector is not 0x9 ?

You should probably use a convertion array from selector to CPU
frequency. Here is a such array valid for 6281 and 6191 SoCs:

u32 kw_6281_cpu_clk[] = { 0, 0, 0, 0, 600000000, 0, 800000000, 1000000000,
                          0, 1200000000, 0, 0, 1500000000, 0, 0, 0 };


Note that I don't know if this array is valid for 6282 and 6283 SoCs.

But for sure, the clock selector for a 6180 SoC is given by differents
bits in the reset at sample register: [4:2] against [4:3],[22],[1].
The conversion array is different too...

Regards,

Simon
Wolfgang Denk - Aug. 1, 2011, 12:53 p.m.
Dear Jason Cooper,

In message <1312160667-14248-1-git-send-email-u-boot@lakedaemon.net> you wrote:
> If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print the
> speeds of the various components.
> 
> Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
> ---
> Changes since v1:
> 	- optimized macros to remove one-timers
> 	- reduced switch/case to if/else since it operates on one bit.
> 	- remove RFC
> 
>  arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41 ++++++++++++++++++++++++++++++
>  arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
>  2 files changed, 42 insertions(+), 0 deletions(-)
...
> +	printf("CPU running @ %dMHz L2 running @ %dMHz\n",
> +		cpu_clk, l2_clk);
> +	printf("SysClock = %dMHz, TClock = %dMHz\n",
> +		sys_clk, t_clk / 1000000);

Please do NOT print such information as part of the regular,
unconditionally printed boot messages.  We want to keep thes
einformatiove, but otherwise as short as possible.

I recommend to use the "clock" command to print such information  then
the user is free to decide if he wants to see this, or not.

Best regards,

Wolfgang Denk
u-boot@lakedaemon.net - Aug. 1, 2011, 1:25 p.m.
On Mon, Aug 01, 2011 at 02:53:00PM +0200, Wolfgang Denk wrote:
> Dear Jason Cooper,
> 
> In message <1312160667-14248-1-git-send-email-u-boot@lakedaemon.net> you wrote:
> > If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print the
> > speeds of the various components.
> > 
> > Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
> > ---
> > Changes since v1:
> > 	- optimized macros to remove one-timers
> > 	- reduced switch/case to if/else since it operates on one bit.
> > 	- remove RFC
> > 
> >  arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41 ++++++++++++++++++++++++++++++
> >  arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
> >  2 files changed, 42 insertions(+), 0 deletions(-)
> ...
> > +	printf("CPU running @ %dMHz L2 running @ %dMHz\n",
> > +		cpu_clk, l2_clk);
> > +	printf("SysClock = %dMHz, TClock = %dMHz\n",
> > +		sys_clk, t_clk / 1000000);
> 
> Please do NOT print such information as part of the regular,
> unconditionally printed boot messages.

Is CONFIG_DISPLAY_CPUINFO always set?  A quick grep / wc -l of
include/configs/*.h shows 64 enabled out of 590 files.

> We want to keep thes einformatiove, but otherwise as short as
> possible.

Agreed.
 
> I recommend to use the "clock" command to print such information  then
> the user is free to decide if he wants to see this, or not.

Interesting.  Let me know if CONFIG_DISPLAY_CPUINFO satisfies your
concerns.  If not, I'll be happy to add this to 'clock'.

thx,

Jason.
u-boot@lakedaemon.net - Aug. 1, 2011, 2:52 p.m.
On Mon, Aug 01, 2011 at 12:20:12PM +0000, Simon Guinot wrote:
> Hi Jason,
> 
> On Mon, Aug 01, 2011 at 01:04:27AM +0000, Jason Cooper wrote:
> > If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print the
> > speeds of the various components.
> > 
> > Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
> > ---
> > Changes since v1:
> > 	- optimized macros to remove one-timers
> > 	- reduced switch/case to if/else since it operates on one bit.
> > 	- remove RFC
> > 
> >  arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41 ++++++++++++++++++++++++++++++
> >  arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
> >  2 files changed, 42 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> > index b4a4c04..818c82f 100644
> > --- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> > +++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
> > @@ -270,11 +270,28 @@ static void kw_sysrst_check(void)
> >  }
> >  
> >  #if defined(CONFIG_DISPLAY_CPUINFO)
> > +#define MSAR_CPUCLCK_EXTRACT(X)	(((X & 0x2) >> 1) | ((X & 0x400000) >> 21) | \
> > +				((X & 0x18) >> 1))
> > +#define MSAR_L2CLCK_EXTRACT(X)  (((X & 0x600) >> 9) | ((X & 0x80000) >> 17))
> > +#define MSAR_DDRCLCK_RTIO_MASK  (0xf << 5)
> > +
> > +/*
> > + * TCCLK bit:
> > + *   1 = 166 MHz
> > + *   0 = 200 MHz
> > + */
> > +#define MSAR_TCLCK_MASK		0x00200000
> > +#define MV_BOARD_TCLK_166MHZ	166666667
> > +#define MV_BOARD_TCLK_200MHZ	200000000
> > +
> >  int print_cpuinfo(void)
> >  {
> >  	char *rev;
> >  	u16 devid = (readl(KW_REG_PCIE_DEVID) >> 16) & 0xffff;
> >  	u8 revid = readl(KW_REG_PCIE_REVID) & 0xff;
> > +	u32 cpu_clk, t_clk, tmp;
> > +	u32 sys_clk, l2_clk;
> > +	u32 l2_ratio, ddr_ratio;
> >  
> >  	if ((readl(KW_REG_DEVICE_ID) & 0x03) > 2) {
> >  		printf("Error.. %s:Unsupported Kirkwood SoC 88F%04x\n", __FUNCTION__, devid);
> > @@ -297,6 +314,30 @@ int print_cpuinfo(void)
> >  	}
> >  
> >  	printf("SoC:   Kirkwood 88F%04x_%s\n", devid, rev);
> > +
> > +	tmp = readl(MPP_SAMPLE_AT_RESET);
> > +	cpu_clk = MSAR_CPUCLCK_EXTRACT(tmp);
> > +	if (cpu_clk == 0x9)
> > +		cpu_clk = 1200;
> > +
> 
> I suspect this code to be broken. Here you get a clock selector (which
> is only relevant for 6281 and 6191 SoCs) from the reset at sample
> register.

Ok, I'll filter on devid, then switch/case on it.

> Which clock frequency do you pick if the selector is not 0x9 ?

Good question.  This was originally dreamplug specific code I got from
globalscale.  I'm cleaning it up as best I can.

> You should probably use a convertion array from selector to CPU
> frequency. Here is a such array valid for 6281 and 6191 SoCs:
> 
> u32 kw_6281_cpu_clk[] = { 0, 0, 0, 0, 600000000, 0, 800000000, 1000000000,
>                           0, 1200000000, 0, 0, 1500000000, 0, 0, 0 };

Thanks, I'll integrate this with the above approach.

> Note that I don't know if this array is valid for 6282 and 6283 SoCs.

I'll address it as unhandled in the code.

> But for sure, the clock selector for a 6180 SoC is given by differents
> bits in the reset at sample register: [4:2] against [4:3],[22],[1].
> The conversion array is different too...

If you have the values handy, or a pointer to them, I'll add that as
well.

thx,

Jason.
Simon Guinot - Aug. 1, 2011, 4:01 p.m.
On Mon, Aug 01, 2011 at 10:52:11AM -0400, Jason wrote:
> On Mon, Aug 01, 2011 at 12:20:12PM +0000, Simon Guinot wrote:
> > Hi Jason,
> > 
> > On Mon, Aug 01, 2011 at 01:04:27AM +0000, Jason Cooper wrote:
> > > If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print the
> > > speeds of the various components.
> > > 
> > > Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
> > > ---
> > > Changes since v1:
> > > 	- optimized macros to remove one-timers
> > > 	- reduced switch/case to if/else since it operates on one bit.
> > > 	- remove RFC
> > > 
> > >  arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41 ++++++++++++++++++++++++++++++
> > >  arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
> > >  2 files changed, 42 insertions(+), 0 deletions(-)
> > > 

... snip ...

> > > +
> > > +	tmp = readl(MPP_SAMPLE_AT_RESET);
> > > +	cpu_clk = MSAR_CPUCLCK_EXTRACT(tmp);
> > > +	if (cpu_clk == 0x9)
> > > +		cpu_clk = 1200;
> > > +
> > 
> > I suspect this code to be broken. Here you get a clock selector (which
> > is only relevant for 6281 and 6191 SoCs) from the reset at sample
> > register.
> 
> Ok, I'll filter on devid, then switch/case on it.
> 
> > Which clock frequency do you pick if the selector is not 0x9 ?
> 
> Good question.  This was originally dreamplug specific code I got from
> globalscale.  I'm cleaning it up as best I can.
> 
> > You should probably use a convertion array from selector to CPU
> > frequency. Here is a such array valid for 6281 and 6191 SoCs:
> > 
> > u32 kw_6281_cpu_clk[] = { 0, 0, 0, 0, 600000000, 0, 800000000, 1000000000,
> >                           0, 1200000000, 0, 0, 1500000000, 0, 0, 0 };
> 
> Thanks, I'll integrate this with the above approach.
> 
> > Note that I don't know if this array is valid for 6282 and 6283 SoCs.
> 
> I'll address it as unhandled in the code.
> 
> > But for sure, the clock selector for a 6180 SoC is given by differents
> > bits in the reset at sample register: [4:2] against [4:3],[22],[1].
> > The conversion array is different too...
> 
> If you have the values handy, or a pointer to them, I'll add that as
> well.

Some time ago, I wrote a cpufreq driver for Linux:

http://git.lacie-nas.org/?p=linux-lacie.git;a=commitdiff;h=d14f36361340d40da3254152edd605fd2ca06c9a

For what it worth, you can find some useful informations about CPU
frequencies for SoCs 6180, 6192 and 6282. Please, note that this driver
has never been submitted nor reviewed (because I realized it was almost
useless).

As a (more reliable ?) alternative, you could take a look at the cpufreq
driver provided by the Marvell LSP.

As a side note, for U-Boot, you can probably assume that the "powersave
mode" is always disabled and then only deal with the high frequencies.

Regards,

Simon
u-boot@lakedaemon.net - Aug. 1, 2011, 4:16 p.m.
On Mon, Aug 01, 2011 at 04:01:19PM +0000, Simon Guinot wrote:
> On Mon, Aug 01, 2011 at 10:52:11AM -0400, Jason wrote:
> > On Mon, Aug 01, 2011 at 12:20:12PM +0000, Simon Guinot wrote:
> > > Hi Jason,
> > > 
> > > On Mon, Aug 01, 2011 at 01:04:27AM +0000, Jason Cooper wrote:
> > > > If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print the
> > > > speeds of the various components.
> > > > 
> > > > Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
> > > > ---
> > > > Changes since v1:
> > > > 	- optimized macros to remove one-timers
> > > > 	- reduced switch/case to if/else since it operates on one bit.
> > > > 	- remove RFC
> > > > 
> > > >  arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41 ++++++++++++++++++++++++++++++
> > > >  arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
> > > >  2 files changed, 42 insertions(+), 0 deletions(-)
> > > > 
> 
> ... snip ...
> 
> > > > +
> > > > +	tmp = readl(MPP_SAMPLE_AT_RESET);
> > > > +	cpu_clk = MSAR_CPUCLCK_EXTRACT(tmp);
> > > > +	if (cpu_clk == 0x9)
> > > > +		cpu_clk = 1200;
> > > > +
> > > 
> > > I suspect this code to be broken. Here you get a clock selector (which
> > > is only relevant for 6281 and 6191 SoCs) from the reset at sample
> > > register.
> > 
> > Ok, I'll filter on devid, then switch/case on it.
> > 
> > > Which clock frequency do you pick if the selector is not 0x9 ?
> > 
> > Good question.  This was originally dreamplug specific code I got from
> > globalscale.  I'm cleaning it up as best I can.
> > 
> > > You should probably use a convertion array from selector to CPU
> > > frequency. Here is a such array valid for 6281 and 6191 SoCs:
> > > 
> > > u32 kw_6281_cpu_clk[] = { 0, 0, 0, 0, 600000000, 0, 800000000, 1000000000,
> > >                           0, 1200000000, 0, 0, 1500000000, 0, 0, 0 };
> > 
> > Thanks, I'll integrate this with the above approach.
> > 
> > > Note that I don't know if this array is valid for 6282 and 6283 SoCs.
> > 
> > I'll address it as unhandled in the code.
> > 
> > > But for sure, the clock selector for a 6180 SoC is given by differents
> > > bits in the reset at sample register: [4:2] against [4:3],[22],[1].
> > > The conversion array is different too...
> > 
> > If you have the values handy, or a pointer to them, I'll add that as
> > well.
> 
> Some time ago, I wrote a cpufreq driver for Linux:
> 
> http://git.lacie-nas.org/?p=linux-lacie.git;a=commitdiff;h=d14f36361340d40da3254152edd605fd2ca06c9a

Thanks for the pointer.  That fills in a lot of holes.
 
thx,

Jason.
u-boot@lakedaemon.net - Aug. 2, 2011, 1:03 p.m.
Wolfgang,

On Mon, Aug 01, 2011 at 01:04:27AM +0000, Jason Cooper wrote:
> If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print the
> speeds of the various components.
> 
> Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
> ---
> Changes since v1:
> 	- optimized macros to remove one-timers
> 	- reduced switch/case to if/else since it operates on one bit.
> 	- remove RFC
> 
>  arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41 ++++++++++++++++++++++++++++++
>  arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
>  2 files changed, 42 insertions(+), 0 deletions(-)
> 

Please drop this patch.  It's cosmetic, becoming a hassle to do
properly, and doesn't move me towards my goal of mainline dreamplug
support.

thx, and sorry for the noise.

Jason.
Prafulla Wadaskar - Aug. 4, 2011, 11:42 a.m.
> -----Original Message-----
> From: Jason [mailto:u-boot@lakedaemon.net]
> Sent: Tuesday, August 02, 2011 6:34 PM
> To: wd@denx.de; Prafulla Wadaskar
> Cc: u-boot@lists.denx.de; clint@debian.org; Prabhanjan Sarnaik; Ashish
> Karkare; Siddarth Gore; bdale@gag.com; simon@sequanux.org
> Subject: Re: [PATCH v2] arm/kirkwood: print speeds with cpu info.
> 
> Wolfgang,
> 
> On Mon, Aug 01, 2011 at 01:04:27AM +0000, Jason Cooper wrote:
> > If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print
> the
> > speeds of the various components.
> >
> > Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
> > ---
> > Changes since v1:
> > 	- optimized macros to remove one-timers
> > 	- reduced switch/case to if/else since it operates on one bit.
> > 	- remove RFC
> >
> >  arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41
> ++++++++++++++++++++++++++++++
> >  arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
> >  2 files changed, 42 insertions(+), 0 deletions(-)
> >
> 
> Please drop this patch.  It's cosmetic, becoming a hassle to do
> properly, and doesn't move me towards my goal of mainline dreamplug
> support.

Hi Jason
I think this is useful information to be displayed.
Thanks for your effort so far on this patch, and I wish that should not go waste.

You can think of supporting this once your dreamplug is supported :-)

Regards..
Prafulla . .
u-boot@lakedaemon.net - Aug. 4, 2011, 1:35 p.m.
On Thu, Aug 04, 2011 at 04:42:51AM -0700, Prafulla Wadaskar wrote:
> 
> 
> > -----Original Message-----
> > From: Jason [mailto:u-boot@lakedaemon.net]
> > Sent: Tuesday, August 02, 2011 6:34 PM
> > To: wd@denx.de; Prafulla Wadaskar
> > Cc: u-boot@lists.denx.de; clint@debian.org; Prabhanjan Sarnaik; Ashish
> > Karkare; Siddarth Gore; bdale@gag.com; simon@sequanux.org
> > Subject: Re: [PATCH v2] arm/kirkwood: print speeds with cpu info.
> > 
> > Wolfgang,
> > 
> > On Mon, Aug 01, 2011 at 01:04:27AM +0000, Jason Cooper wrote:
> > > If CONFIG_DISPLAY_CPUINFO is enabled on kirkwood SoCs, this will print
> > the
> > > speeds of the various components.
> > >
> > > Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
> > > ---
> > > Changes since v1:
> > > 	- optimized macros to remove one-timers
> > > 	- reduced switch/case to if/else since it operates on one bit.
> > > 	- remove RFC
> > >
> > >  arch/arm/cpu/arm926ejs/kirkwood/cpu.c    |   41
> > ++++++++++++++++++++++++++++++
> > >  arch/arm/include/asm/arch-kirkwood/cpu.h |    1 +
> > >  2 files changed, 42 insertions(+), 0 deletions(-)
> > >
> > 
> > Please drop this patch.  It's cosmetic, becoming a hassle to do
> > properly, and doesn't move me towards my goal of mainline dreamplug
> > support.
> 
> Hi Jason
> I think this is useful information to be displayed.
> Thanks for your effort so far on this patch, and I wish that should not go waste.
> 
> You can think of supporting this once your dreamplug is supported :-)

Of course, I just found it was becoming very time consuming to do
properly and taking time away from learning devicetree.  Once dreamplug
support is in, I'll readdress it.

thx,

Jason.
Wolfgang Denk - Aug. 4, 2011, 9:30 p.m.
Dear Jason,

In message <20110801132532.GG20071@titan.lakedaemon.net> you wrote:
>
> > I recommend to use the "clock" command to print such information  then
> > the user is free to decide if he wants to see this, or not.
> 
> Interesting.  Let me know if CONFIG_DISPLAY_CPUINFO satisfies your
> concerns.  If not, I'll be happy to add this to 'clock'.

My preference is to add this to the "clock" command, but I will not
reject a CONFIG_DISPLAY_CPUINFO based patch.

Best regards,

Wolfgang Denk

Patch

diff --git a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
index b4a4c04..818c82f 100644
--- a/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
+++ b/arch/arm/cpu/arm926ejs/kirkwood/cpu.c
@@ -270,11 +270,28 @@  static void kw_sysrst_check(void)
 }
 
 #if defined(CONFIG_DISPLAY_CPUINFO)
+#define MSAR_CPUCLCK_EXTRACT(X)	(((X & 0x2) >> 1) | ((X & 0x400000) >> 21) | \
+				((X & 0x18) >> 1))
+#define MSAR_L2CLCK_EXTRACT(X)  (((X & 0x600) >> 9) | ((X & 0x80000) >> 17))
+#define MSAR_DDRCLCK_RTIO_MASK  (0xf << 5)
+
+/*
+ * TCCLK bit:
+ *   1 = 166 MHz
+ *   0 = 200 MHz
+ */
+#define MSAR_TCLCK_MASK		0x00200000
+#define MV_BOARD_TCLK_166MHZ	166666667
+#define MV_BOARD_TCLK_200MHZ	200000000
+
 int print_cpuinfo(void)
 {
 	char *rev;
 	u16 devid = (readl(KW_REG_PCIE_DEVID) >> 16) & 0xffff;
 	u8 revid = readl(KW_REG_PCIE_REVID) & 0xff;
+	u32 cpu_clk, t_clk, tmp;
+	u32 sys_clk, l2_clk;
+	u32 l2_ratio, ddr_ratio;
 
 	if ((readl(KW_REG_DEVICE_ID) & 0x03) > 2) {
 		printf("Error.. %s:Unsupported Kirkwood SoC 88F%04x\n", __FUNCTION__, devid);
@@ -297,6 +314,30 @@  int print_cpuinfo(void)
 	}
 
 	printf("SoC:   Kirkwood 88F%04x_%s\n", devid, rev);
+
+	tmp = readl(MPP_SAMPLE_AT_RESET);
+	cpu_clk = MSAR_CPUCLCK_EXTRACT(tmp);
+	if (cpu_clk == 0x9)
+		cpu_clk = 1200;
+
+	l2_ratio = MSAR_L2CLCK_EXTRACT(tmp);
+	l2_clk = cpu_clk / l2_ratio;
+
+	ddr_ratio = tmp & MSAR_DDRCLCK_RTIO_MASK;
+	ddr_ratio = ddr_ratio >> 5;
+	if (ddr_ratio == 4)
+		sys_clk = 400;
+
+	if (tmp & MSAR_TCLCK_MASK)
+		t_clk = MV_BOARD_TCLK_166MHZ;
+	else
+		t_clk = MV_BOARD_TCLK_200MHZ;
+
+	printf("CPU running @ %dMHz L2 running @ %dMHz\n",
+		cpu_clk, l2_clk);
+	printf("SysClock = %dMHz, TClock = %dMHz\n",
+		sys_clk, t_clk / 1000000);
+
 	return 0;
 }
 #endif /* CONFIG_DISPLAY_CPUINFO */
diff --git a/arch/arm/include/asm/arch-kirkwood/cpu.h b/arch/arm/include/asm/arch-kirkwood/cpu.h
index d28c51a..28ddd25 100644
--- a/arch/arm/include/asm/arch-kirkwood/cpu.h
+++ b/arch/arm/include/asm/arch-kirkwood/cpu.h
@@ -41,6 +41,7 @@ 
 #define KW_REG_SYSRST_CNT		(KW_MPP_BASE + 0x50)
 #define SYSRST_CNT_1SEC_VAL		(25*1000000)
 #define KW_REG_MPP_OUT_DRV_REG		(KW_MPP_BASE + 0xE0)
+#define MPP_SAMPLE_AT_RESET		(KW_MPP_BASE + 0x30)
 
 enum memory_bank {
 	BANK0,