diff mbox series

[06/26] arm64: dts: renesas: ebisu: Fix adv7482 hexadecimal register address

Message ID 9130c15829846fae56ea729f42d1894b8413f89b.1554281697.git.horms+renesas@verge.net.au
State New
Headers show
Series [GIT,PULL] Renesas ARM64 Based SoC DT Updates for v5.2 | expand

Commit Message

Simon Horman April 3, 2019, 10:53 a.m. UTC 
From: Takeshi Kihara <takeshi.kihara.df@renesas.com>

The register address used for the reg property of the adv7482 node in
other Renesas device trees are decimal not hex, change this for Ebisu to
align it with the others.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Niklas: rewrite commit message]
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Acked-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
 arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
index 62004b609b15..bfa40196029b 100644
--- a/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77990-ebisu.dts
@@ -407,7 +407,7 @@ 
 		};
 
 		port@a {
-			reg = <0xa>;
+			reg = <10>;
 
 			adv7482_txa: endpoint {
 				clock-lanes = <0>;