From patchwork Mon Jul 25 18:05:38 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Schwarz X-Patchwork-Id: 106732 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E8F87B70B9 for ; Tue, 26 Jul 2011 04:08:19 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2756828089; Mon, 25 Jul 2011 20:08:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id KTa6tu3t7Mhc; Mon, 25 Jul 2011 20:08:17 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E8E0D28099; Mon, 25 Jul 2011 20:08:16 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2C23F2809F for ; Mon, 25 Jul 2011 20:08:14 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3QMhcoIV6w66 for ; Mon, 25 Jul 2011 20:08:13 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-fx0-f50.google.com (mail-fx0-f50.google.com [209.85.161.50]) by theia.denx.de (Postfix) with ESMTPS id 77A9428099 for ; Mon, 25 Jul 2011 20:08:08 +0200 (CEST) Received: by mail-fx0-f50.google.com with SMTP id 2so6070609fxh.23 for ; Mon, 25 Jul 2011 11:08:07 -0700 (PDT) Received: by 10.223.145.7 with SMTP id b7mr4336460fav.56.1311617287686; Mon, 25 Jul 2011 11:08:07 -0700 (PDT) Received: from localhost.localdomain (DSL01.212.114.252.242.ip-pool.NEFkom.net [212.114.252.242]) by mx.google.com with ESMTPS id o17sm3929945fal.2.2011.07.25.11.08.05 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 25 Jul 2011 11:08:06 -0700 (PDT) From: Simon Schwarz To: u-boot@lists.denx.de, simonschwarzcor@gmail.com Date: Mon, 25 Jul 2011 20:05:38 +0200 Message-Id: <1311617138-17041-6-git-send-email-simonschwarzcor@gmail.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1311617138-17041-1-git-send-email-simonschwarzcor@gmail.com> References: <1309270480-31918-1-git-send-email-schwarz@corscience.de> <1311617138-17041-1-git-send-email-simonschwarzcor@gmail.com> Organization: Corscience GmbH & Co. KG Cc: mporter@ti.com, albert.u.boot@aribaud.net Subject: [U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add NAND SPL support to the devkit8000 config --- V1 changes: ADD devkit8000_nand to board.cfg ADD nand_spl Makefile, llinker script, spl-devkit8000.c ADD config ecc, SRAM, SPL to board config ADD CONFIG_SYS_SRAM_START and _SIZE to board config ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config V2 changes: ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and CONFIG_SPL_LDSCRIPT to board config CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_* ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to expect u-boot and where to load it. ADD some barrier to not build board_eth_init in SPL DEL no changes to board.cfg DEL everything used the old nand_spl layout (Makefile, linker script, spl-devkit8000.c) CHG cosmetic Transition from V1 to V2 also includes that this patch is now based on - the new SPL layout by Aneesh V and Daniel Schwierzeck - the OMAP4 SPL patches by Aneesh V This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl support" (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111) Signed-off-by: Simon Schwarz --- board/timll/devkit8000/devkit8000.c | 2 +- include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++ 2 files changed, 47 insertions(+), 1 deletions(-) diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c index 95afaaa..9b53742 100644 --- a/board/timll/devkit8000/devkit8000.c +++ b/board/timll/devkit8000/devkit8000.c @@ -119,7 +119,7 @@ void set_muxconf_regs(void) MUX_DEVKIT8000(); } -#ifdef CONFIG_DRIVER_DM9000 +#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD) /* * Routine: board_eth_init * Description: Setting up the Ethernet hardware. diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 125c690..46c1e3d 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -307,4 +307,50 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) +/* SRAM config */ +#define CONFIG_SYS_SRAM_START 0x40200000 +#define CONFIG_SYS_SRAM_SIZE 0xFFFF /*64 kB*/ + +/* Defines for SPL */ +#define CONFIG_SPL + +#define CONFIG_SPL_LIBCOMMON_SUPPORT +#define CONFIG_SPL_LIBDISK_SUPPORT +#define CONFIG_SPL_I2C_SUPPORT +#define CONFIG_SPL_LIBGENERIC_SUPPORT +#define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_POWER_SUPPORT +#define CONFIG_SPL_NAND_SUPPORT +#define CONFIG_SPL_LDSCRIPT $(CPUDIR)/omap-common/u-boot-spl.lds + +#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ +#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */ +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK + +#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/ +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 + +/* NAND boot config */ +#define CONFIG_SYS_NAND_PAGE_COUNT 64 +#define CONFIG_SYS_NAND_PAGE_SIZE 2048 +#define CONFIG_SYS_NAND_OOBSIZE 64 +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ + 10, 11, 12, 13} + +#define CONFIG_SYS_NAND_ECCSIZE 512 +#define CONFIG_SYS_NAND_ECCBYTES 3 + +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \ + CONFIG_SYS_NAND_ECCSIZE) +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \ + CONFIG_SYS_NAND_ECCSTEPS) + +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST + +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE + #endif /* __CONFIG_H */