From patchwork Mon Jul 25 17:22:38 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: fix disabling interrupts in sun4u From: Artyom Tarasenko X-Patchwork-Id: 106722 Message-Id: <316f198de781f7b819456f433d84ead284769a71.1311606610.git.atar4qemu@gmail.com> To: qemu-devel@nongnu.org Cc: blauwirbel@gmail.com, Artyom Tarasenko Date: Mon, 25 Jul 2011 19:22:38 +0200 clear interrupt request if the interrupt priority < CPU pil clear hardware interrupt request if interrupts are disabled Signed-off-by: Artyom Tarasenko --- hw/sun4u.c | 6 ++++-- 1 files changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/sun4u.c b/hw/sun4u.c index d7dcaf0..7f95aeb 100644 --- a/hw/sun4u.c +++ b/hw/sun4u.c @@ -255,7 +255,7 @@ void cpu_check_irqs(CPUState *env) pil |= 1 << 14; } - if (!pil) { + if (pil < (2 << env->psrpil)){ if (env->interrupt_request & CPU_INTERRUPT_HARD) { CPUIRQ_DPRINTF("Reset CPU IRQ (current interrupt %x)\n", env->interrupt_index); @@ -287,10 +287,12 @@ void cpu_check_irqs(CPUState *env) break; } } - } else { + } else if (env->interrupt_request & CPU_INTERRUPT_HARD) { CPUIRQ_DPRINTF("Interrupts disabled, pil=%08x pil_in=%08x softint=%08x " "current interrupt %x\n", pil, env->pil_in, env->softint, env->interrupt_index); + env->interrupt_index = 0; + cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); } }