| Message ID | 20190322191436.6268-4-urjaman@gmail.com |
|---|---|
| State | New, archived |
| Delegated to: | Philipp Tomsich |
| Headers | show |
| Series | Veyron Speedy / ASUS C201 fixes | expand |
On Fri, 22 Mar 2019 at 13:15, Urja Rannikko <urjaman@gmail.com> wrote: > > Atleast hat is what it says in the TRM. At least that > > Signed-off-by: Urja Rannikko <urjaman@gmail.com> > --- > arch/arm/mach-rockchip/rk3288-board.c | 1 + > 1 file changed, 1 insertion(+) Reviewed-by: Simon Glass <sjg@chromium.org>
Hi, On Sat, Mar 30, 2019 at 9:18 PM Simon Glass <sjg@chromium.org> wrote: > > On Fri, 22 Mar 2019 at 13:15, Urja Rannikko <urjaman@gmail.com> wrote: > > > > Atleast hat is what it says in the TRM. > > At least that Whoops. But actually i found out (by chance from an another patch on the list just now) that instead of documenting this bit set, we could instead remove it since it is already set in arch/arm/mach-rockchip/rk3288/rk3288.c. I just added the comment because i thought from code proximity that this code had something to do with the debug uart thing that i was cleaning out and upon checking it had nothing to do with the uart.. > > > > > Signed-off-by: Urja Rannikko <urjaman@gmail.com> > > --- > > arch/arm/mach-rockchip/rk3288-board.c | 1 + > > 1 file changed, 1 insertion(+) > > Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/mach-rockchip/rk3288-board.c b/arch/arm/mach-rockchip/rk3288-board.c index f5df44dab1..9c05149610 100644 --- a/arch/arm/mach-rockchip/rk3288-board.c +++ b/arch/arm/mach-rockchip/rk3288-board.c @@ -335,6 +335,7 @@ int board_early_init_f(void) return ret; } + /* Select RK PWM (as opposed to old PWM solution) */ rk_setreg(GRF_SOC_CON2, 1 << 0); /*
Atleast hat is what it says in the TRM. Signed-off-by: Urja Rannikko <urjaman@gmail.com> --- arch/arm/mach-rockchip/rk3288-board.c | 1 + 1 file changed, 1 insertion(+)