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[v3,2/7] doc/device-tree: Edit device tree documentation for imc to include trace-node information.

Message ID 20190322064352.21264-3-anju@linux.vnet.ibm.com
State Accepted
Headers show
Series skiboot: OPAL support for IMC trace-mode | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (b392d785eb49630b9f00fef8d17944ed82b2c1fe)
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot success Test snowpatch/job/snowpatch-skiboot on branch master
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco success Signed-off-by present

Commit Message

Anju T Sudhakar March 22, 2019, 6:43 a.m. UTC 
Add trace-node information in the device-tree document for IMC.

Signed-off-by: Anju T Sudhakar <anju@linux.vnet.ibm.com>
---
 doc/device-tree/imc.rst | 50 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 50 insertions(+)
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Patch

diff --git a/doc/device-tree/imc.rst b/doc/device-tree/imc.rst
index 8533cc12..6046b459 100644
--- a/doc/device-tree/imc.rst
+++ b/doc/device-tree/imc.rst
@@ -46,6 +46,14 @@  IMC device/units bindings
                 chipids = <chip-id for the base_addr >
         };
 
+        trace@0 {
+                 compatible = "ibm,imc-counters";
+                 events-prefix = "trace_";
+                 reg = <0x0 0x8>;
+                 events = < &TRACE_IMC >;
+                 type = <0x2>;
+                 size = <0x40000>;
+         };
 
 IMC device event bindings
 -------------------------
@@ -70,3 +78,45 @@  IMC device event bindings
 		/* List of events supported */
 
         };
+
+        TRACE_IMC: trace-events {
+              #address-cells = <0x1>;
+              #size-cells = <0x1>;
+
+              event@10200000 {
+                    event-name = "cycles" ; /* For trace node, we only have cycles event now */
+                    reg = <0x10200000 0x8>;
+                    desc = "Reference cycles" ;
+              };
+         };
+
+Trace-mode SCOM
+----------------
+
+Trace scom is a 64 bit value which contains the event information for
+IMC-trace mode. Following is the trace-scom layout.
+
+**TRACE_IMC_SCOM bit representation**
+
+:0-1:   SAMPSEL
+
+:2-33:  CPMC_LOAD
+
+:34-40: CPMC1SEL
+
+:41-47: CPMC2SEL
+
+:48-50: BUFFERSIZE
+
+:51-63: RESERVED
+
+*CPMC_LOAD* contains the sampling duration. *SAMPSEL* and *CPMC*SEL*
+determines the event to count. *BUFFRSIZE* indicates the memory range.
+
+*BUFFERSIZE* can be
+::
+   b’000’ - 4K entries * 64 per entry = 256K
+   b’001’ - 8K entries * 64 per entry = 512K
+   b’010’ - 16K entries * 64 per entry = 1M
+   b’011’ - 32K entries * 64 per entry = 2M
+   b’100’ - 64K entries * 64 per entry = 4M