From patchwork Wed Mar 20 16:04:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 1059362 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=nvidia.com Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=nvidia.com header.i=@nvidia.com header.b="OCbpEM6Y"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44PZVb3wynz9sPl for ; Thu, 21 Mar 2019 03:04:23 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726611AbfCTQEX (ORCPT ); Wed, 20 Mar 2019 12:04:23 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:6936 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726403AbfCTQEW (ORCPT ); Wed, 20 Mar 2019 12:04:22 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 20 Mar 2019 09:04:19 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 20 Mar 2019 09:04:20 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 20 Mar 2019 09:04:20 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL106.nvidia.com (172.18.146.12) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 20 Mar 2019 16:04:19 +0000 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 20 Mar 2019 16:04:20 +0000 Received: from moonraker.nvidia.com (Not Verified[10.21.132.148]) by hqnvemgw01.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Wed, 20 Mar 2019 09:04:20 -0700 From: Jon Hunter To: Jaroslav Kysela , Takashi Iwai CC: , , Sameer Pujar , Jonathan Hunter Subject: [PROBLEM] ALSA: hda: PCM streams are suspended while opening Date: Wed, 20 Mar 2019 16:04:14 +0000 Message-ID: <1553097854-10287-1-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1553097859; bh=gXkY0g05i44AOciyOnxpujnJIA+uoTCCbXSyc8/6ZT0=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: MIME-Version:Content-Type; b=OCbpEM6Y0TT+hwPSMPdNQn+h+TzQIWt1H43+5vHLlz/txL7ToTFfWSFheg1UVA+T3 PFIjcqjr7p43NBKD554CHkkVbua5Ed46CRFKP5IyNy/WHbYvsbrB5vmmNfqRD92MAC 8+MbMOudcOI8u1zKYT2fnbI2wa1gNm/2LpAYxUrr7yQbYh2WPvzvmYc9q9/+iHBdnK SouwDroyoAFA3G/LHBA417ZDxfdLGOhVkhv4Zn541HOTyq8k847zSvD/65l2lAG4tQ 1yvf/4rlgH4LsRmnwaq2qCPI4+6ZOCnrqkIauue5vbe3On/xWW/+Wwqd2EPU0jilal D0VPUgx2783Qw== Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org From: Jonathan Hunter This issue is not observed on the latest mainline kernel since the 'ALSA: PCM suspend cleanup' series has been applied and the snd_pcm_suspend_all() function call in the HDA codec driver has been removed. However, this issue impacts stable kernel branches and so I am trying to find a solution for these branches. When stress testing audio playback across multiple HDA streams simultaneously, the following failure is sometimes observed when starting playback ... Unable to set hw params for playback: File descriptor in bad state The problem is caused because ... 1. Playback is starting for one HDA codec and so the chip->open_mutex in azx_pcm_open() has been acquired. 2. Playback for another HDA codec is starting but is blocked waiting to acquire the chip->open_mutex in azx_pcm_open(). 3. For the HDA codec that is blocked, its runtime-pm status is still enabled from a previous playback session that has since completed and been closed, however its autosuspend timeout has not expired yet. 4. For the HDA codec that is blocked, the runtime-pm autosuspend timeout now occurs calling the runtime-pm suspend callback and this calls snd_pcm_suspend_all() placing all PCM streams in the suspended state. 5. The block HDA codec is now unblocked and fails to set the HW params because the PCM stream is in the suspended state. The above has been observed on Tegra platforms where the autosuspend delay is set to 1 second and there is a delay to an AZX command. This highlights that there is a window of time where autosuspend can place the HDA PCM stream in the suspended state while opening the stream and cause playback to fail. Looking at commit 3d21ef0b49f8 ('ALSA: pcm: Suspend streams globally via device type PM ops') it appears that the call to snd_pcm_suspend_all() has now been moved to the to the suspend handler for PCM streams and so I am wondering if it would be equivalent to make the following change to the HDA codec driver to achieve the same behaviour but only for the HDA driver. So far the issue has not been observed with this change. Please note that I am not sending this as a formal patch as I wanted to get some feedback/comments on the above. Reported-by: Jonathan Hunter Signed-off-by: Takashi Iwai Tested-by: Jon Hunter --- sound/pci/hda/hda_codec.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 9f8d59e7e89f..26ecc6e1f524 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -2923,12 +2923,9 @@ static void hda_call_codec_resume(struct hda_codec *codec) static int hda_codec_runtime_suspend(struct device *dev) { struct hda_codec *codec = dev_to_hda_codec(dev); - struct hda_pcm *pcm; unsigned int state; cancel_delayed_work_sync(&codec->jackpoll_work); - list_for_each_entry(pcm, &codec->pcm_list_head, list) - snd_pcm_suspend_all(pcm->pcm); state = hda_call_codec_suspend(codec); if (codec->link_down_at_suspend || (codec_has_clkstop(codec) && codec_has_epss(codec) && @@ -2948,11 +2945,22 @@ static int hda_codec_runtime_resume(struct device *dev) pm_runtime_mark_last_busy(dev); return 0; } + +static int hda_codec_suspend(struct device *dev) +{ + struct hda_codec *codec = dev_to_hda_codec(dev); + struct hda_pcm *pcm; + + list_for_each_entry(pcm, &codec->pcm_list_head, list) + snd_pcm_suspend_all(pcm->pcm); + + return pm_runtime_force_suspend(dev); +} #endif /* CONFIG_PM */ /* referred in hda_bind.c */ const struct dev_pm_ops hda_codec_driver_pm = { - SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + SET_SYSTEM_SLEEP_PM_OPS(hda_codec_suspend, pm_runtime_force_resume) SET_RUNTIME_PM_OPS(hda_codec_runtime_suspend, hda_codec_runtime_resume, NULL)