Patchwork [U-Boot,2/3] powerpc/85xx: Add support for P2041[e] XAUI in SERDES

login
register
mail settings
Submitter Kumar Gala
Date July 21, 2011, 5:20 a.m.
Message ID <1311225621-9674-3-git-send-email-galak@kernel.crashing.org>
Download mbox | patch
Permalink /patch/105918/
State Accepted
Commit db564bccefaa537b4a2bd46778b00536bab17258
Delegated to: Kumar Gala
Headers show

Comments

Kumar Gala - July 21, 2011, 5:20 a.m.
We add XAUI_FM1 into the SERDES tables for P2041[e] devices.  However
for the P2040[e] devices that dont support XAUI we handle this at
runtime via SVR checks.  If we are on a P2040[e] device the SERDES
functions will behave as follows:

is_serdes_prtcl_valid() will always report invalid if prtcl passed in is
XAUI_FM1.

serdes_get_prtcl() will report NONE if the prtcl in the table is set to
XAUI_FM1.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/cpu/mpc85xx/p2041_serdes.c |   26 +++++++++++++++++++++-----
 1 files changed, 21 insertions(+), 5 deletions(-)
Kumar Gala - July 27, 2011, 2:57 a.m.
On Jul 21, 2011, at 12:20 AM, Kumar Gala wrote:

> We add XAUI_FM1 into the SERDES tables for P2041[e] devices.  However
> for the P2040[e] devices that dont support XAUI we handle this at
> runtime via SVR checks.  If we are on a P2040[e] device the SERDES
> functions will behave as follows:
> 
> is_serdes_prtcl_valid() will always report invalid if prtcl passed in is
> XAUI_FM1.
> 
> serdes_get_prtcl() will report NONE if the prtcl in the table is set to
> XAUI_FM1.
> 
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/cpu/mpc85xx/p2041_serdes.c |   26 +++++++++++++++++++++-----
> 1 files changed, 21 insertions(+), 5 deletions(-)

applied to 85xx

- k

Patch

diff --git a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c
index 83bc82f..f68f281 100644
--- a/arch/powerpc/cpu/mpc85xx/p2041_serdes.c
+++ b/arch/powerpc/cpu/mpc85xx/p2041_serdes.c
@@ -37,8 +37,8 @@  static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
 		PCIE2, PCIE2, PCIE2, NONE, NONE, NONE, NONE, SATA1,
 		SATA2, NONE, NONE, NONE, NONE, },
 	[0x9] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
-		PCIE2, PCIE2, PCIE2, NONE, NONE, NONE, NONE,
-		NONE, NONE, NONE, NONE, NONE, NONE, },
+		PCIE2, PCIE2, PCIE2, NONE, NONE, XAUI_FM1, XAUI_FM1,
+		XAUI_FM1, XAUI_FM1, NONE, NONE, NONE, NONE, },
 	[0xa] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
 		PCIE2, PCIE2, PCIE2, NONE, NONE, PCIE3, PCIE3, PCIE3,
 		PCIE3, NONE, NONE, NONE, NONE, },
@@ -53,8 +53,8 @@  static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
 		SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, SATA1, SATA2, NONE,
 		NONE, NONE, NONE, },
 	[0x17] = {NONE, NONE, PCIE1, PCIE3, PCIE2, PCIE2, SGMII_FM1_DTSEC3,
-		SGMII_FM1_DTSEC4, NONE, NONE, NONE, NONE, NONE,
-		NONE, NONE, NONE, NONE, NONE, },
+		SGMII_FM1_DTSEC4, NONE, NONE, XAUI_FM1, XAUI_FM1, XAUI_FM1,
+		XAUI_FM1, NONE, NONE, NONE, NONE, },
 	[0x19] = {NONE, NONE, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE2,
 		PCIE2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, NONE, NONE,
 		NONE, NONE, SATA1, SATA2, NONE, NONE, NONE, NONE, },
@@ -68,19 +68,35 @@  static u8 serdes_cfg_tbl[][SRDS_MAX_LANES] = {
 
 enum srds_prtcl serdes_get_prtcl(int cfg, int lane)
 {
+	enum srds_prtcl prtcl;
+	u32 svr = get_svr();
+	u32 ver = SVR_SOC_VER(svr);
+
 	if (!serdes_lane_enabled(lane))
 		return NONE;
 
-	return serdes_cfg_tbl[cfg][lane];
+	prtcl = serdes_cfg_tbl[cfg][lane];
+
+	/* P2040[e] does not support XAUI */
+	if (((ver == SVR_P2040) || (ver == SVR_P2040_E)) && (prtcl == XAUI_FM1))
+		prtcl = NONE;
+
+	return prtcl;
 }
 
 int is_serdes_prtcl_valid(u32 prtcl)
 {
 	int i;
+	u32 svr = get_svr();
+	u32 ver = SVR_SOC_VER(svr);
 
 	if (prtcl > ARRAY_SIZE(serdes_cfg_tbl))
 		return 0;
 
+	/* P2040[e] does not support XAUI */
+	if (((ver == SVR_P2040) || (ver == SVR_P2040_E)) && (prtcl == XAUI_FM1))
+		return 0;
+
 	for (i = 0; i < SRDS_MAX_LANES; i++) {
 		if (serdes_cfg_tbl[prtcl][i] != NONE)
 			return 1;