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PATCH [9/n] X32: PR target/49798: Zero-extend symbol address to 64bit if needed

Message ID 20110721040627.GA18628@intel.com
State New
Headers show

Commit Message

H.J. Lu July 21, 2011, 4:06 a.m. UTC 
The testcase is gcc.c-torture/compile/pr45728.c.  This patch zero-extends
symbol address to 64bit if needd.  OK for trunk?

Thanks.


H.J.
----
2011-07-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR target/49798
	* config/i386/i386.c (ix86_asm_integer): New.
	(TARGET_ASM_INTEGER): Likewise.
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Patch

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 279a0a3..9e4e601 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -14300,6 +14300,25 @@  i386_asm_output_addr_const_extra (FILE *file, rtx x)
 
   return true;
 }
+
+/* Implementation of TARGET_ASM_INTEGER.  */
+
+static bool
+ix86_asm_integer (rtx x, unsigned int size, int aligned_p)
+{
+  if (TARGET_X32
+      && size == 8
+      && GET_CODE (x) == SYMBOL_REF)
+    {
+      /* Zero-extend symbol address to 64bit.  */
+      fputs (ASM_LONG, asm_out_file);
+      output_addr_const (asm_out_file, x);
+      fputc ('\n', asm_out_file);
+      fprintf (asm_out_file, ASM_LONG "0\n");
+      return true;
+    }
+  return default_assemble_integer (x, size, aligned_p);
+}
 
 /* Split one or more double-mode RTL references into pairs of half-mode
    references.  The RTL can be REG, offsettable MEM, integer constant, or
@@ -34903,6 +34922,8 @@  ix86_autovectorize_vector_sizes (void)
 #define TARGET_ASM_UNALIGNED_SI_OP TARGET_ASM_ALIGNED_SI_OP
 #undef TARGET_ASM_UNALIGNED_DI_OP
 #define TARGET_ASM_UNALIGNED_DI_OP TARGET_ASM_ALIGNED_DI_OP
+#undef TARGET_ASM_INTEGER
+#define TARGET_ASM_INTEGER ix86_asm_integer
 
 #undef TARGET_PRINT_OPERAND
 #define TARGET_PRINT_OPERAND ix86_print_operand