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[for-4.1,v3,04/17] tcg: Support cross-class moves without instruction support

Message ID 20190319172126.7502-5-richard.henderson@linaro.org
State New
Headers show
Series tcg/ppc: Add vector opcodes | expand

Commit Message

Richard Henderson March 19, 2019, 5:21 p.m. UTC
PowerPC Altivec does not support direct moves between vector registers
and general registers.  So when tcg_out_mov fails, we can use the
backing memory for the temporary to perform the move.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/tcg.c | 25 ++++++++++++++++++++++---
 1 file changed, 22 insertions(+), 3 deletions(-)

Comments

David Gibson March 20, 2019, 5 a.m. UTC | #1
On Tue, Mar 19, 2019 at 10:21:13AM -0700, Richard Henderson wrote:
> PowerPC Altivec does not support direct moves between vector registers
> and general registers.  So when tcg_out_mov fails, we can use the
> backing memory for the temporary to perform the move.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

LGTM, not that I know TCG well enough to understand it fully.

> ---
>  tcg/tcg.c | 25 ++++++++++++++++++++++---
>  1 file changed, 22 insertions(+), 3 deletions(-)
> 
> diff --git a/tcg/tcg.c b/tcg/tcg.c
> index 34ee06564f..b5389ea767 100644
> --- a/tcg/tcg.c
> +++ b/tcg/tcg.c
> @@ -3369,7 +3369,18 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
>                                           ots->indirect_base);
>              }
>              if (!tcg_out_mov(s, otype, ots->reg, ts->reg)) {
> -                abort();
> +                /* Cross register class move not supported.
> +                   Store the source register into the destination slot
> +                   and leave the destination temp as TEMP_VAL_MEM.  */
> +                assert(!ots->fixed_reg);
> +                if (!ts->mem_allocated) {
> +                    temp_allocate_frame(s, ots);
> +                }
> +                tcg_out_st(s, ts->type, ts->reg,
> +                           ots->mem_base->reg, ots->mem_offset);
> +                ots->mem_coherent = 1;
> +                temp_free_or_dead(s, ots, -1);
> +                return;
>              }
>          }
>          ots->val_type = TEMP_VAL_REG;
> @@ -3471,7 +3482,11 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
>              reg = tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs,
>                                  o_preferred_regs, ts->indirect_base);
>              if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {
> -                abort();
> +                /* Cross register class move not supported.  Sync the
> +                   temp back to its slot and load from there.  */
> +                temp_sync(s, ts, i_allocated_regs, 0, 0);
> +                tcg_out_ld(s, ts->type, reg,
> +                           ts->mem_base->reg, ts->mem_offset);
>              }
>          }
>          new_args[i] = reg;
> @@ -3630,7 +3645,11 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
>                  if (ts->reg != reg) {
>                      tcg_reg_free(s, reg, allocated_regs);
>                      if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {
> -                        abort();
> +                        /* Cross register class move not supported.  Sync the
> +                           temp back to its slot and load from there.  */
> +                        temp_sync(s, ts, allocated_regs, 0, 0);
> +                        tcg_out_ld(s, ts->type, reg,
> +                                   ts->mem_base->reg, ts->mem_offset);
>                      }
>                  }
>              } else {
diff mbox series

Patch

diff --git a/tcg/tcg.c b/tcg/tcg.c
index 34ee06564f..b5389ea767 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -3369,7 +3369,18 @@  static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
                                          ots->indirect_base);
             }
             if (!tcg_out_mov(s, otype, ots->reg, ts->reg)) {
-                abort();
+                /* Cross register class move not supported.
+                   Store the source register into the destination slot
+                   and leave the destination temp as TEMP_VAL_MEM.  */
+                assert(!ots->fixed_reg);
+                if (!ts->mem_allocated) {
+                    temp_allocate_frame(s, ots);
+                }
+                tcg_out_st(s, ts->type, ts->reg,
+                           ots->mem_base->reg, ots->mem_offset);
+                ots->mem_coherent = 1;
+                temp_free_or_dead(s, ots, -1);
+                return;
             }
         }
         ots->val_type = TEMP_VAL_REG;
@@ -3471,7 +3482,11 @@  static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
             reg = tcg_reg_alloc(s, arg_ct->u.regs, i_allocated_regs,
                                 o_preferred_regs, ts->indirect_base);
             if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {
-                abort();
+                /* Cross register class move not supported.  Sync the
+                   temp back to its slot and load from there.  */
+                temp_sync(s, ts, i_allocated_regs, 0, 0);
+                tcg_out_ld(s, ts->type, reg,
+                           ts->mem_base->reg, ts->mem_offset);
             }
         }
         new_args[i] = reg;
@@ -3630,7 +3645,11 @@  static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
                 if (ts->reg != reg) {
                     tcg_reg_free(s, reg, allocated_regs);
                     if (!tcg_out_mov(s, ts->type, reg, ts->reg)) {
-                        abort();
+                        /* Cross register class move not supported.  Sync the
+                           temp back to its slot and load from there.  */
+                        temp_sync(s, ts, allocated_regs, 0, 0);
+                        tcg_out_ld(s, ts->type, reg,
+                                   ts->mem_base->reg, ts->mem_offset);
                     }
                 }
             } else {