[U-Boot,5/9] riscv: ae350: disable ATCPIT100 timer

Message ID	20190319090750.8923-6-uboot@andestech.com
State	Superseded
Delegated to:	Andes
Headers	show Return-Path: <u-boot-bounces@lists.denx.de> From: Andes <uboot@andestech.com> To: <u-boot@lists.denx.de> Date: Tue, 19 Mar 2019 17:07:46 +0800 Message-ID: <20190319090750.8923-6-uboot@andestech.com> In-Reply-To: <20190319090750.8923-1-uboot@andestech.com> References: <20190319090750.8923-1-uboot@andestech.com> MIME-Version: 1.0 Cc: rickchen36@gmail.com, greentime@andestech.com, palmer@sifive.com, agraf@suse.de Subject: [U-Boot] [PATCH 5/9] riscv: ae350: disable ATCPIT100 timer Precedence: list Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
Series	AE350 SMP support RISC-V \| expand [U-Boot,0/9] AE350 SMP support RISC-V [U-Boot,1/9] riscv: ax25: Create a simple-bus driver for the soc node [U-Boot,2/9] riscv: Add a SYSCON driver for Andestech's PLIC [U-Boot,3/9] riscv: Add a SYSCON driver for Andestech's PLMT [U-Boot,4/9] riscv: ae350: initialize PLIC [U-Boot,5/9] riscv: ae350: disable ATCPIT100 timer [U-Boot,6/9] riscv: ax25: Add platform-specific Kconfig options [U-Boot,7/9] riscv: ax25: Andes specific cache shall only support in M-mode. [U-Boot,8/9] riscv: dts: ae350 support SMP. [U-Boot,9/9] riscv: ae350: enable SMP

Message ID

20190319090750.8923-6-uboot@andestech.com

State

Superseded

Delegated to:

Andes

Headers

From: Andes <uboot@andestech.com>
To: <u-boot@lists.denx.de>
Date: Tue, 19 Mar 2019 17:07:46 +0800
Message-ID: <20190319090750.8923-6-uboot@andestech.com>
In-Reply-To: <20190319090750.8923-1-uboot@andestech.com>
References: <20190319090750.8923-1-uboot@andestech.com>
MIME-Version: 1.0
Cc: rickchen36@gmail.com, greentime@andestech.com, palmer@sifive.com,
	agraf@suse.de
Subject: [U-Boot] [PATCH 5/9] riscv: ae350: disable ATCPIT100 timer
Precedence: list
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: base64
Errors-To: u-boot-bounces@lists.denx.de
Sender: "U-Boot" <u-boot-bounces@lists.denx.de>

Series

AE350 SMP support RISC-V | expand

Commit Message

Andes March 19, 2019, 9:07 a.m. UTC

From: Rick Chen <rick@andestech.com>

Disable ATCPIT100 SoC timer and replace by PLMT.

Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
---
 configs/ae350_rv32_defconfig | 1 -
 configs/ae350_rv64_defconfig | 1 -
 2 files changed, 2 deletions(-)

Comments

Bin Meng March 20, 2019, 7:22 a.m. UTC | #1

On Tue, Mar 19, 2019 at 5:12 PM Andes <uboot@andestech.com> wrote:
>
> From: Rick Chen <rick@andestech.com>
>
> Disable ATCPIT100 SoC timer and replace by PLMT.
>
> Signed-off-by: Rick Chen <rick@andestech.com>
> Cc: Greentime Hu <greentime@andestech.com>
> ---
>  configs/ae350_rv32_defconfig | 1 -
>  configs/ae350_rv64_defconfig | 1 -
>  2 files changed, 2 deletions(-)
>

Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig
index 5837b48..e13c7de 100644
--- a/configs/ae350_rv32_defconfig
+++ b/configs/ae350_rv32_defconfig
@@ -33,4 +33,3 @@  CONFIG_BAUDRATE=38400
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_ATCSPI200_SPI=y
-CONFIG_ATCPIT100_TIMER=y
diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig
index b250d3f..a41f918 100644
--- a/configs/ae350_rv64_defconfig
+++ b/configs/ae350_rv64_defconfig
@@ -34,4 +34,3 @@  CONFIG_BAUDRATE=38400
 CONFIG_SYS_NS16550=y
 CONFIG_SPI=y
 CONFIG_ATCSPI200_SPI=y
-CONFIG_ATCPIT100_TIMER=y

[U-Boot,5/9] riscv: ae350: disable ATCPIT100 timer

Commit Message

Comments

Patch