@@ -6140,16 +6140,20 @@ static void gen_cmtst_vec(unsigned vece, TCGv_vec d, TCGv_vec a, TCGv_vec b)
const GVecGen3 cmtst_op[4] = {
{ .fni4 = gen_helper_neon_tst_u8,
.fniv = gen_cmtst_vec,
+ .opc = INDEX_op_cmp_vec,
.vece = MO_8 },
{ .fni4 = gen_helper_neon_tst_u16,
.fniv = gen_cmtst_vec,
+ .opc = INDEX_op_cmp_vec,
.vece = MO_16 },
{ .fni4 = gen_cmtst_i32,
.fniv = gen_cmtst_vec,
+ .opc = INDEX_op_cmp_vec,
.vece = MO_32 },
{ .fni8 = gen_cmtst_i64,
.fniv = gen_cmtst_vec,
.prefer_i64 = TCG_TARGET_REG_BITS == 64,
+ .opc = INDEX_op_cmp_vec,
.vece = MO_64 },
};
This allows us to fall back to integers if the tcg backend does not support comparisons in the given vece. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/translate.c | 4 ++++ 1 file changed, 4 insertions(+)