From patchwork Fri Mar 15 20:07:59 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stephen Boyd X-Patchwork-Id: 1057233 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-gpio-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=chromium.org header.i=@chromium.org header.b="cxnaaYgB"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 44Lc836zdZz9s5c for ; Sat, 16 Mar 2019 07:08:03 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727096AbfCOUIC (ORCPT ); Fri, 15 Mar 2019 16:08:02 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:46255 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726477AbfCOUIC (ORCPT ); Fri, 15 Mar 2019 16:08:02 -0400 Received: by mail-pf1-f195.google.com with SMTP id s23so7053135pfe.13 for ; Fri, 15 Mar 2019 13:08:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=zJTJtCHTW4gN40l0qZRJ+gEBkunAEWcQrIjrIGSaUec=; b=cxnaaYgBBcKpejC5EFkzlUM5OuzOz5131423UVGdwAgD518MUgEA/on76nZbVOceFQ qNXxj534HxlKOQz90jV/fCWSzlyW2DoBY61YBvb8dhaHnmQSQbgasNkxkZmE+HmzDe5U NhUCujCDkUPF0TwHVXJ0MLDF6qNpxoBBJF1qY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=zJTJtCHTW4gN40l0qZRJ+gEBkunAEWcQrIjrIGSaUec=; b=T6+VleKiW61i56nRkL8846Oz+ecjd/emGWQ17Z80feAiVlUD+SpTlFYN/5dEs6IKPx hTTF5x/PJUTzXJ35pOUMlahBOLMo7hMHpn/I4C9rP1jRPxIFFEIK+P1jX4EvhewNI+Af Hp8kgNaN4EpUsIh6kBpkdTXgh6+eCqTPOQHNIjWbTAi/s/jw07CXm8GCUTPrn4/8kqoI 5ahKkbJ02tITZ+GwrmdFCBbodFQHX7kDrfVzME8Zh0G4XxkEgK6Ddgroqg2dO+nhfpjw kfrVZmy912w7hoO1IBz+HItbtXGSsOQDxRb1VyZD6y/y6el3miUVEHBcg32SuoJadAsy oo4Q== X-Gm-Message-State: APjAAAUU+Vr2E4IWfkVO4GabAwyaitjSjGdmYJ5TMEzE5+8p/VMeCu8g xvOXD6N/8qyv2whw6z0fvRL03S9kGFjOaQ== X-Google-Smtp-Source: APXvYqx+uoTEcnILylmeJLMr0tqgnbguvI2GmOKclhq14KKCLYHWbEqAEqlg1sERc0negByM3xU8Vw== X-Received: by 2002:a63:2a82:: with SMTP id q124mr5139459pgq.402.1552680481392; Fri, 15 Mar 2019 13:08:01 -0700 (PDT) Received: from smtp.gmail.com ([2620:15c:202:1:fa53:7765:582b:82b9]) by smtp.gmail.com with ESMTPSA id f15sm3758376pfa.11.2019.03.15.13.08.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 15 Mar 2019 13:08:00 -0700 (PDT) From: Stephen Boyd To: Thomas Gleixner Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, Lina Iyer , Marc Zyngier Subject: [PATCH] genirq: Respect IRQCHIP_SKIP_SET_WAKE in irq_chip_set_wake_parent() Date: Fri, 15 Mar 2019 13:07:59 -0700 Message-Id: <20190315200759.139479-1-swboyd@chromium.org> X-Mailer: git-send-email 2.21.0.225.g810b269d1ac-goog MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This function returns an error if a child interrupt controller calls irq_chip_set_wake_parent() but that parent interrupt controller has the IRQCHIP_SKIP_SET_WAKE flag. Let's return 0 for success instead because there isn't anything to do. There's also the possibility that a parent indicates that we should skip it, but the grandparent has an .irq_set_wake callback. Let's iterate through the parent chain as long as the IRQCHIP_SKIP_SET_WAKE flag isn't set so we can find the first parent that needs to handle the wake configuration. This fixes a problem on my Qualcomm sdm845 device where I'm trying to enable wake on an irq from the gpio controller that's a child of the qcom pdc interrupt controller. The qcom pdc interrupt controller has the IRQCHIP_SKIP_SET_WAKE flag set, and so does the grandparent (ARM GIC), causing this function to return a failure because the parent controller doesn't have the .irq_set_wake callback set. Cc: Lina Iyer Cc: Marc Zyngier Signed-off-by: Stephen Boyd --- kernel/irq/chip.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c index 3faef4a77f71..280d612ba71b 100644 --- a/kernel/irq/chip.c +++ b/kernel/irq/chip.c @@ -1448,7 +1448,13 @@ int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info) */ int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on) { - data = data->parent_data; + for (data = data->parent_data; data; data = data->parent_data) + if (!(data->chip->flags & IRQCHIP_SKIP_SET_WAKE)) + break; + + if (!data) + return 0; + if (data->chip->irq_set_wake) return data->chip->irq_set_wake(data, on);