From patchwork Tue Jul 19 21:41:59 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Subject: RFA: patch to fix broken FRV target From: Vladimir Makarov X-Patchwork-Id: 105546 Message-Id: <4E25FA27.1030200@redhat.com> To: gcc-patches@gcc.gnu.org Cc: nickc@redhat.com Date: Tue, 19 Jul 2011 17:41:59 -0400 Currently, FRV port is broken. It crashes on assertion in IRA because the right pressure register classes can not be found. I started work on this and found that register move cost for moving between GPR_REGS (or QUAD_REGS) is too costly (40) although FRV machine dependent code reports it cheap explicitly. The cost is changed to the big value by the following code in reginfo.c::init_move_cost cost = last_move_cost[i][j]; for (p2 = ®_class_subclasses[j][0]; *p2 != LIM_REG_CLASSES; p2++) if (*p2 != i && contains_reg_of_mode[*p2][m]) cost = MAX (cost, move_cost[m][i][*p2]); for (p1 = ®_class_subclasses[i][0]; *p1 != LIM_REG_CLASSES; p1++) if (*p1 != j && contains_reg_of_mode[*p1][m]) cost = MAX (cost, move_cost[m][*p1][j]); when i==GPR_REGS and *p2 == GR8_REGS for example. That happens because moves from/to GR8_REGS, GR9_REGS, and other classes which are subsets of GPR_REGS are treated too costly in frv_register_move_cost. I could modify a code in init_move_cost ignoring costly subclasses when moves inside the superclass i s less costly than memory. But I think it is wrong thing to do because it affects other targets in unknown now way and because I think we still need the right costs for GR8_REGS, ... So I think the following patch is the right way to fix frv target. Nick, is the patch ok for you? 2011-07-19 Vladimir Makarov * config/frv/frv.c (frv_register_move_cost): Define explicitly costs for subclasses of GR_REGS. Index: config/frv/frv.c =================================================================== --- config/frv/frv.c (revision 176462) +++ config/frv/frv.c (working copy) @@ -6818,6 +6818,13 @@ frv_register_move_cost (enum machine_mod case QUAD_REGS: case GPR_REGS: + case GR8_REGS: + case GR9_REGS: + case GR89_REGS: + case FDPIC_REGS: + case FDPIC_FPTR_REGS: + case FDPIC_CALL_REGS: + switch (to) { default: @@ -6825,6 +6832,13 @@ frv_register_move_cost (enum machine_mod case QUAD_REGS: case GPR_REGS: + case GR8_REGS: + case GR9_REGS: + case GR89_REGS: + case FDPIC_REGS: + case FDPIC_FPTR_REGS: + case FDPIC_CALL_REGS: + return LOW_COST; case FPR_REGS: @@ -6844,6 +6858,13 @@ frv_register_move_cost (enum machine_mod case QUAD_REGS: case GPR_REGS: + case GR8_REGS: + case GR9_REGS: + case GR89_REGS: + case FDPIC_REGS: + case FDPIC_FPTR_REGS: + case FDPIC_CALL_REGS: + case QUAD_ACC_REGS: case ACCG_REGS: return MEDIUM_COST; @@ -6862,6 +6883,13 @@ frv_register_move_cost (enum machine_mod case QUAD_REGS: case GPR_REGS: + case GR8_REGS: + case GR9_REGS: + case GR89_REGS: + case FDPIC_REGS: + case FDPIC_FPTR_REGS: + case FDPIC_CALL_REGS: + return MEDIUM_COST; }