From patchwork Tue Jul 19 17:33:25 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 105499 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id A5EDDB6F77 for ; Wed, 20 Jul 2011 03:34:02 +1000 (EST) Received: (qmail 17129 invoked by alias); 19 Jul 2011 17:34:01 -0000 Received: (qmail 17121 invoked by uid 22791); 19 Jul 2011 17:34:00 -0000 X-SWARE-Spam-Status: No, hits=-2.2 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, TW_ZJ X-Spam-Check-By: sourceware.org Received: from mail-pv0-f175.google.com (HELO mail-pv0-f175.google.com) (74.125.83.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Tue, 19 Jul 2011 17:33:25 +0000 Received: by pvf24 with SMTP id 24so4458050pvf.20 for ; Tue, 19 Jul 2011 10:33:25 -0700 (PDT) MIME-Version: 1.0 Received: by 10.142.80.3 with SMTP id d3mr635870wfb.363.1311096805274; Tue, 19 Jul 2011 10:33:25 -0700 (PDT) Received: by 10.142.89.19 with HTTP; Tue, 19 Jul 2011 10:33:25 -0700 (PDT) In-Reply-To: References: <20110719163037.GE2687@tyan-ft48-01.lab.bos.redhat.com> Date: Tue, 19 Jul 2011 19:33:25 +0200 Message-ID: Subject: Re: PATCH [6/n] X32: Supprot 32bit address From: Uros Bizjak To: Jakub Jelinek Cc: "H.J. Lu" , Richard Guenther , gcc-patches@gcc.gnu.org Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org On Tue, Jul 19, 2011 at 6:37 PM, Uros Bizjak wrote: >>> Sometimes, the compiler is really creative in inventing instructions: >>> >>> (insn 47 46 49 7 (set (reg:SI 68 [ D.1686 ]) >>>         (subreg:SI (plus:SF (reg:SF 159 [ D.1685 ]) >>>                 (reg:SF 159 [ D.1685 ])) 0)) omp_atomic1.f90:17 247 {*lea_2} >>>      (expr_list:REG_DEAD (reg:SF 159 [ D.1685 ]) >>>         (nil))) >>> >>> Really funny. >> >> That's the job of combiner to try all kinds of stuff and it is the >> responsibility of the backend to reject those.  I think it would be better >> to get back to testing Pmode in the legitimate address hook, perhaps >> allowing ptr_mode too in addition to Pmode (which for -m32/-m64 won't mean >> any change, just for -mx32). > > Actually, there is a bypass in ix86_decompose_address, and this RTX > squeezed through. IMO constructs like this should be rejected in > i_d_a, which effectively only moves Pmode/ptr_mode check here. > > I'm looking into it. The problem was in fact the declaration of no_seg_address_operand predicate that was defined as special predicate and this way ignoring the mode of the operand. Attached patch also includes check for DImode SUBREGS for base register, to eventually save x32 some trouble in future. I'm currently regression testing the patch added to the patch that removed Pmode checks. H.J., can you please test it on x32? Uros. Index: predicates.md =================================================================== --- predicates.md (revision 176462) +++ predicates.md (working copy) @@ -796,7 +796,7 @@ ;; Return true if op if a valid address, and does not contain ;; a segment override. -(define_special_predicate "no_seg_address_operand" +(define_predicate "no_seg_address_operand" (match_operand 0 "address_operand") { struct ix86_address parts; Index: i386.c =================================================================== --- i386.c (revision 176462) +++ i386.c (working copy) @@ -11085,8 +11085,16 @@ ix86_decompose_address (rtx addr, struct int retval = 1; enum ix86_address_seg seg = SEG_DEFAULT; - if (REG_P (addr) || GET_CODE (addr) == SUBREG) + if (REG_P (addr)) base = addr; + else if (GET_CODE (addr) == SUBREG) + { + /* Allow only subregs of DImode hard regs. */ + if (register_no_elim_operand (SUBREG_REG (addr), DImode)) + base = addr; + else + return 0; + } else if (GET_CODE (addr) == PLUS) { rtx addends[4], op;