diff mbox series

[V2,08/10] mmc: cqhci: add CQHCI_SSC1 register CBC field mask

Message ID 1552327359-8036-8-git-send-email-skomatineni@nvidia.com
State Changes Requested
Headers show
Series [V2,01/10] mmc: tegra: fix ddr signaling for non-ddr modes | expand

Commit Message

Sowjanya Komatineni March 11, 2019, 6:02 p.m. UTC 
This patch adds define for CBC field mask of the register
CQHCI_SSC1.

Tested-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
---
 drivers/mmc/host/cqhci.h | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h
index 981158da3326..9fb2bb638884 100644
--- a/drivers/mmc/host/cqhci.h
+++ b/drivers/mmc/host/cqhci.h
@@ -88,6 +88,7 @@ 
 
 /* send status config 1 */
 #define CQHCI_SSC1			0x40
+#define CQHCI_SSC1_CBC_MASK		GENMASK(19, 16)
 
 /* send status config 2 */
 #define CQHCI_SSC2			0x44