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Mon, 18 Jul 2011 00:17:31 +0200 (CEST) Received: by gemini.denx.de (Postfix, from userid 500) id EA66517E88D1; Mon, 18 Jul 2011 00:17:30 +0200 (CEST) From: Wolfgang Denk To: u-boot@lists.denx.de Date: Mon, 18 Jul 2011 00:17:06 +0200 Message-Id: <1310941040-6526-39-git-send-email-wd@denx.de> X-Mailer: git-send-email 1.7.6 In-Reply-To: <1310941040-6526-1-git-send-email-wd@denx.de> References: <1310941040-6526-1-git-send-email-wd@denx.de> Subject: [U-Boot] [PATCH 38/52] ARM: remove broken "integratorcp" board X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.9 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Wolfgang Denk --- MAINTAINERS | 4 - MAKEALL | 3 - Makefile | 13 - board/armltd/integrator/Makefile | 58 ---- board/armltd/integrator/config.mk | 5 - board/armltd/integrator/integrator.c | 138 ---------- board/armltd/integrator/lowlevel_init.S | 213 -------------- board/armltd/integrator/pci.c | 396 --------------------------- board/armltd/integrator/split_by_variant.sh | 220 --------------- board/armltd/integrator/timer.c | 200 -------------- doc/README.scrapyard | 1 + include/configs/integratorap.h | 289 ------------------- include/configs/integratorcp.h | 255 ----------------- 13 files changed, 1 insertions(+), 1794 deletions(-) delete mode 100644 board/armltd/integrator/Makefile delete mode 100644 board/armltd/integrator/config.mk delete mode 100644 board/armltd/integrator/integrator.c delete mode 100644 board/armltd/integrator/lowlevel_init.S delete mode 100644 board/armltd/integrator/pci.c delete mode 100755 board/armltd/integrator/split_by_variant.sh delete mode 100644 board/armltd/integrator/timer.c delete mode 100644 include/configs/integratorap.h delete mode 100644 include/configs/integratorcp.h diff --git a/MAINTAINERS b/MAINTAINERS index 50f0a0a..776712a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -737,10 +737,6 @@ Sandeep Paulraj davinci_dm365evm ARM926EJS davinci_dm6467evm ARM926EJS -Peter Pearse - integratorcp All current ARM supplied & supported core modules - -see http://www.arm.com/products/DevTools/Hardware_Platforms.html - Dave Peverley omap730p2 ARM926EJS diff --git a/MAKEALL b/MAKEALL index 1be76f1..997fd35 100755 --- a/MAKEALL +++ b/MAKEALL @@ -344,15 +344,12 @@ LIST_ARM9=" \ ## ARM10 Systems ######################################################################### LIST_ARM10=" \ - integratorcp \ - cp1026 \ " ######################################################################### ## ARM11 Systems ######################################################################### LIST_ARM11=" \ - cp1136 \ omap2420h4 \ apollon \ imx31_litekit \ diff --git a/Makefile b/Makefile index 43b86b1..af6ff87 100644 --- a/Makefile +++ b/Makefile @@ -892,19 +892,6 @@ TNY_A9260_config : unconfig @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h @$(MKCONFIG) -n $@ -a tny_a9260 arm arm926ejs tny_a9260 calao at91 -######################################################################## -## ARM Integrator boards - see doc/README-integrator for more info. -ap_config \ -ap922_config: unconfig - @board/armltd/integrator/split_by_variant.sh ap $@ - -integratorcp_config \ -cp_config \ -cp1136_config \ -cp922_config \ -cp1026_config: unconfig - @board/armltd/integrator/split_by_variant.sh cp $@ - xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1)))) omap1610inn_config \ diff --git a/board/armltd/integrator/Makefile b/board/armltd/integrator/Makefile deleted file mode 100644 index c452631..0000000 --- a/board/armltd/integrator/Makefile +++ /dev/null @@ -1,58 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2004 -# ARM Ltd. -# Philippe Robin, -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -SOBJS-y := lowlevel_init.o - -COBJS-y := integrator.o -COBJS-$(CONFIG_PCI) += pci.o -COBJS-y += timer.o - -SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) -COBJS := $(addprefix $(obj),$(COBJS-y)) -SOBJS := $(addprefix $(obj),$(SOBJS-y)) - -$(LIB): $(obj).depend $(COBJS) $(SOBJS) - $(call cmd_link_o_target, $(COBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(COBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/armltd/integrator/config.mk b/board/armltd/integrator/config.mk deleted file mode 100644 index 8b57af1..0000000 --- a/board/armltd/integrator/config.mk +++ /dev/null @@ -1,5 +0,0 @@ -# -# image should be loaded at 0x01000000 -# - -CONFIG_SYS_TEXT_BASE = 0x01000000 diff --git a/board/armltd/integrator/integrator.c b/board/armltd/integrator/integrator.c deleted file mode 100644 index 9bb56b5..0000000 --- a/board/armltd/integrator/integrator.c +++ /dev/null @@ -1,138 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, - * - * (C) Copyright 2003 - * Texas Instruments, - * Kshitij Gupta - * - * (C) Copyright 2004 - * ARM Ltd. - * Philippe Robin, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -void peripheral_power_enable (void); - -#if defined(CONFIG_SHOW_BOOT_PROGRESS) -void show_boot_progress(int progress) -{ - printf("Boot reached stage %d\n", progress); -} -#endif - -#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF) - -/* - * Miscellaneous platform dependent initialisations - */ - -int board_init (void) -{ - /* arch number of Integrator Board */ -#ifdef CONFIG_ARCH_CINTEGRATOR - gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR; -#else - gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR; -#endif - - /* adress of boot parameters */ - gd->bd->bi_boot_params = 0x00000100; - - gd->flags = 0; - -#ifdef CONFIG_CM_REMAP -extern void cm_remap(void); - cm_remap(); /* remaps writeable memory to 0x00000000 */ -#endif - - icache_enable (); - - return 0; -} - -int misc_init_r (void) -{ -#ifdef CONFIG_PCI - pci_init(); -#endif - setenv("verify", "n"); - return (0); -} - -/****************************** - Routine: - Description: -******************************/ -int dram_init (void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - -#ifdef CONFIG_CM_SPD_DETECT - { -extern void dram_query(void); - unsigned long cm_reg_sdram; - unsigned long sdram_shift; - - dram_query(); /* Assembler accesses to CM registers */ - /* Queries the SPD values */ - - /* Obtain the SDRAM size from the CM SDRAM register */ - - cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM); - /* Register SDRAM size - * - * 0xXXXXXXbbb000bb 16 MB - * 0xXXXXXXbbb001bb 32 MB - * 0xXXXXXXbbb010bb 64 MB - * 0xXXXXXXbbb011bb 128 MB - * 0xXXXXXXbbb100bb 256 MB - * - */ - sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4; - gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift; - - } -#endif /* CM_SPD_DETECT */ - - return 0; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_SMC91111 - rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); -#endif - rc += pci_eth_init(bis); - return rc; -} -#endif diff --git a/board/armltd/integrator/lowlevel_init.S b/board/armltd/integrator/lowlevel_init.S deleted file mode 100644 index ab9589c..0000000 --- a/board/armltd/integrator/lowlevel_init.S +++ /dev/null @@ -1,213 +0,0 @@ -/* - * Board specific setup info - * - * (C) Copyright 2004, ARM Ltd. - * Philippe Robin, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - - /* Reset using CM control register */ -.global reset_cpu -reset_cpu: - mov r0, #CM_BASE - ldr r1,[r0,#OS_CTRL] - orr r1,r1,#CMMASK_RESET - str r1,[r0,#OS_CTRL] - -reset_failed: - b reset_failed - -/* Set up the platform, once the cpu has been initialized */ -.globl lowlevel_init -lowlevel_init: - /* If U-Boot has been run after the ARM boot monitor - * then all the necessary actions have been done - * otherwise we are running from user flash mapped to 0x00000000 - * --- DO NOT REMAP BEFORE THE CODE HAS BEEN RELOCATED -- - * Changes to the (possibly soft) reset defaults of the processor - * itself should be performed in cpu/arm<>/start.S - * This function affects only the core module or board settings - */ - -#ifdef CONFIG_CM_INIT - /* CM has an initialization register - * - bits in it are wired into test-chip pins to force - * reset defaults - * - may need to change its contents for U-Boot - */ - - /* set the desired CM specific value */ - mov r2,#CMMASK_LOWVEC /* Vectors at 0x00000000 for all */ - -#if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E) - orr r2,r2,#CMMASK_INIT_102 -#else - -#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \ - !defined (CONFIG_CM940T) - -#ifdef CONFIG_CM_MULTIPLE_SSRAM - /* set simple mapping */ - and r2,r2,#CMMASK_MAP_SIMPLE -#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */ - -#ifdef CONFIG_CM_TCRAM - /* disable TCRAM */ - and r2,r2,#CMMASK_TCRAM_DISABLE -#endif /* #ifdef CONFIG_CM_TCRAM */ - -#if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \ - defined (CONFIG_CM1136JF_S) - - and r2,r2,#CMMASK_LE - -#endif /* cpu with little endian initialization */ - - orr r2,r2,#CMMASK_CMxx6_COMMON - -#endif /* CMxx6 code */ - -#endif /* ARM102xxE value */ - - /* read CM_INIT */ - mov r0, #CM_BASE - ldr r1, [r0, #OS_INIT] - /* check against desired bit setting */ - and r3,r1,r2 - cmp r3,r2 - beq init_reg_OK - - /* lock for change */ - mov r3, #CMVAL_LOCK1 - add r3,r3,#CMVAL_LOCK2 - str r3, [r0, #OS_LOCK] - /* set desired value */ - orr r1,r1,r2 - /* write & relock CM_INIT */ - str r1, [r0, #OS_INIT] - mov r1, #CMVAL_UNLOCK - str r1, [r0, #OS_LOCK] - - /* soft reset so new values used */ - b reset_cpu - -init_reg_OK: - -#endif /* CONFIG_CM_INIT */ - - mov pc, lr - -#ifdef CONFIG_CM_SPD_DETECT - /* Fast memory is available for the DRAM data - * - ensure it has been transferred, then summarize the data - * into a CM register - */ -.globl dram_query -dram_query: - stmfd r13!,{r4-r6,lr} - /* set up SDRAM info */ - /* - based on example code from the CM User Guide */ - mov r0, #CM_BASE - -readspdbit: - ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */ - and r1, r1, #0x20 /* mask SPD bit (5) */ - cmp r1, #0x20 /* test if set */ - bne readspdbit - -setupsdram: - add r0, r0, #OS_SPD /* address the copy of the SDP data */ - ldrb r1, [r0, #3] /* number of row address lines */ - ldrb r2, [r0, #4] /* number of column address lines */ - ldrb r3, [r0, #5] /* number of banks */ - ldrb r4, [r0, #31] /* module bank density */ - mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */ - mov r5, r5, ASL#2 /* size in MB */ - mov r0, #CM_BASE /* reload for later code */ - cmp r5, #0x10 /* is it 16MB? */ - bne not16 - mov r6, #0x2 /* store size and CAS latency of 2 */ - b writesize - -not16: - cmp r5, #0x20 /* is it 32MB? */ - bne not32 - mov r6, #0x6 - b writesize - -not32: - cmp r5, #0x40 /* is it 64MB? */ - bne not64 - mov r6, #0xa - b writesize - -not64: - cmp r5, #0x80 /* is it 128MB? */ - bne not128 - mov r6, #0xe - b writesize - -not128: - /* if it is none of these sizes then it is either 256MB, or - * there is no SDRAM fitted so default to 256MB - */ - mov r6, #0x12 - -writesize: - mov r1, r1, ASL#8 /* row addr lines from SDRAM reg */ - orr r2, r1, r2, ASL#12 /* OR in column address lines */ - orr r3, r2, r3, ASL#16 /* OR in number of banks */ - orr r6, r6, r3 /* OR in size and CAS latency */ - str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */ - -#endif /* #ifdef CONFIG_CM_SPD_DETECT */ - - ldmfd r13!,{r4-r6,pc} /* back to caller */ - -#ifdef CONFIG_CM_REMAP - /* CM remap bit is operational - * - use it to map writeable memory at 0x00000000, in place of flash - */ -.globl cm_remap -cm_remap: - stmfd r13!,{r4-r10,lr} - - mov r0, #CM_BASE - ldr r1, [r0, #OS_CTRL] - orr r1, r1, #CMMASK_REMAP /* set remap and led bits */ - str r1, [r0, #OS_CTRL] - - /* Now 0x00000000 is writeable, replace the vectors */ - ldr r0, =_start /* r0 <- start of vectors */ - ldr r2, =_armboot_start /* r2 <- past vectors */ - sub r1,r1,r1 /* destination 0x00000000 */ - -copy_vec: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - ble copy_vec - - ldmfd r13!,{r4-r10,pc} /* back to caller */ - -#endif /* #ifdef CONFIG_CM_REMAP */ diff --git a/board/armltd/integrator/pci.c b/board/armltd/integrator/pci.c deleted file mode 100644 index 6ee2a85..0000000 --- a/board/armltd/integrator/pci.c +++ /dev/null @@ -1,396 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, - * - * (C) Copyright 2003 - * Texas Instruments, - * Kshitij Gupta - * - * (C) Copyright 2004 - * ARM Ltd. - * Philippe Robin, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -/* - * Initialize PCI Devices, report devices found. - */ - -#ifndef CONFIG_PCI_PNP -static struct pci_config_table pci_integrator_config_table[] = { - { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID, - pci_cfgfunc_config_device, { PCI_ENET0_IOADDR, - PCI_ENET0_MEMADDR, - PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }}, - { } -}; -#endif /* CONFIG_PCI_PNP */ - -/* V3 access routines */ -#define _V3Write16(o,v) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned short)(v)) -#define _V3Read16(o) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o))) - -#define _V3Write32(o,v) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned int)(v)) -#define _V3Read32(o) (*(volatile unsigned int *)(PCI_V3_BASE + (unsigned int)(o))) - -/* Compute address necessary to access PCI config space for the given */ -/* bus and device. */ -#define PCI_CONFIG_ADDRESS( __bus, __devfn, __offset ) ({ \ - unsigned int __address, __devicebit; \ - unsigned short __mapaddress; \ - unsigned int __dev = PCI_DEV (__devfn); /* FIXME to check!! (slot?) */ \ - \ - if (__bus == 0) { \ - /* local bus segment so need a type 0 config cycle */ \ - /* build the PCI configuration "address" with one-hot in A31-A11 */ \ - __address = PCI_CONFIG_BASE; \ - __address |= ((__devfn & 0x07) << 8); \ - __address |= __offset & 0xFF; \ - __mapaddress = 0x000A; /* 101=>config cycle, 0=>A1=A0=0 */ \ - __devicebit = (1 << (__dev + 11)); \ - \ - if ((__devicebit & 0xFF000000) != 0) { \ - /* high order bits are handled by the MAP register */ \ - __mapaddress |= (__devicebit >> 16); \ - } else { \ - /* low order bits handled directly in the address */ \ - __address |= __devicebit; \ - } \ - } else { /* bus !=0 */ \ - /* not the local bus segment so need a type 1 config cycle */ \ - /* A31-A24 are don't care (so clear to 0) */ \ - __mapaddress = 0x000B; /* 101=>config cycle, 1=>A1&A0 from PCI_CFG */ \ - __address = PCI_CONFIG_BASE; \ - __address |= ((__bus & 0xFF) << 16); /* bits 23..16 = bus number */ \ - __address |= ((__dev & 0x1F) << 11); /* bits 15..11 = device number */ \ - __address |= ((__devfn & 0x07) << 8); /* bits 10..8 = function number */ \ - __address |= __offset & 0xFF; /* bits 7..0 = register number */ \ - } \ - _V3Write16 (V3_LB_MAP1, __mapaddress); \ - __address; \ -}) - -/* _V3OpenConfigWindow - open V3 configuration window */ -#define _V3OpenConfigWindow() { \ - /* Set up base0 to see all 512Mbytes of memory space (not */ \ - /* prefetchable), this frees up base1 for re-use by configuration*/ \ - /* memory */ \ - \ - _V3Write32 (V3_LB_BASE0, ((INTEGRATOR_PCI_BASE & 0xFFF00000) | \ - 0x90 | V3_LB_BASE_M_ENABLE)); \ - /* Set up base1 to point into configuration space, note that MAP1 */ \ - /* register is set up by pciMakeConfigAddress(). */ \ - \ - _V3Write32 (V3_LB_BASE1, ((CPU_PCI_CNFG_ADRS & 0xFFF00000) | \ - 0x40 | V3_LB_BASE_M_ENABLE)); \ -} - -/* _V3CloseConfigWindow - close V3 configuration window */ -#define _V3CloseConfigWindow() { \ - /* Reassign base1 for use by prefetchable PCI memory */ \ - _V3Write32 (V3_LB_BASE1, (((INTEGRATOR_PCI_BASE + 0x10000000) & 0xFFF00000) \ - | 0x84 | V3_LB_BASE_M_ENABLE)); \ - _V3Write16 (V3_LB_MAP1, \ - (((INTEGRATOR_PCI_BASE + 0x10000000) & 0xFFF00000) >> 16) | 0x0006); \ - \ - /* And shrink base0 back to a 256M window (NOTE: MAP0 already correct) */ \ - \ - _V3Write32 (V3_LB_BASE0, ((INTEGRATOR_PCI_BASE & 0xFFF00000) | \ - 0x80 | V3_LB_BASE_M_ENABLE)); \ -} - -static int pci_integrator_read_byte (struct pci_controller *hose, pci_dev_t dev, - int offset, unsigned char *val) -{ - _V3OpenConfigWindow (); - *val = *(volatile unsigned char *) PCI_CONFIG_ADDRESS (PCI_BUS (dev), - PCI_FUNC (dev), - offset); - _V3CloseConfigWindow (); - - return 0; -} - -static int pci_integrator_read__word (struct pci_controller *hose, - pci_dev_t dev, int offset, - unsigned short *val) -{ - _V3OpenConfigWindow (); - *val = *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev), - PCI_FUNC (dev), - offset); - _V3CloseConfigWindow (); - - return 0; -} - -static int pci_integrator_read_dword (struct pci_controller *hose, - pci_dev_t dev, int offset, - unsigned int *val) -{ - _V3OpenConfigWindow (); - *val = *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev), - PCI_FUNC (dev), - offset); - *val |= (*(volatile unsigned int *) - PCI_CONFIG_ADDRESS (PCI_BUS (dev), PCI_FUNC (dev), - (offset + 2))) << 16; - _V3CloseConfigWindow (); - - return 0; -} - -static int pci_integrator_write_byte (struct pci_controller *hose, - pci_dev_t dev, int offset, - unsigned char val) -{ - _V3OpenConfigWindow (); - *(volatile unsigned char *) PCI_CONFIG_ADDRESS (PCI_BUS (dev), - PCI_FUNC (dev), - offset) = val; - _V3CloseConfigWindow (); - - return 0; -} - -static int pci_integrator_write_word (struct pci_controller *hose, - pci_dev_t dev, int offset, - unsigned short val) -{ - _V3OpenConfigWindow (); - *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev), - PCI_FUNC (dev), - offset) = val; - _V3CloseConfigWindow (); - - return 0; -} - -static int pci_integrator_write_dword (struct pci_controller *hose, - pci_dev_t dev, int offset, - unsigned int val) -{ - _V3OpenConfigWindow (); - *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev), - PCI_FUNC (dev), - offset) = (val & 0xFFFF); - *(volatile unsigned short *) PCI_CONFIG_ADDRESS (PCI_BUS (dev), - PCI_FUNC (dev), - (offset + 2)) = ((val >> 16) & 0xFFFF); - _V3CloseConfigWindow (); - - return 0; -} -/****************************** - * PCI initialisation - ******************************/ - -struct pci_controller integrator_hose = { -#ifndef CONFIG_PCI_PNP - config_table: pci_integrator_config_table, -#endif -}; - -void pci_init_board (void) -{ - volatile int i, j; - struct pci_controller *hose = &integrator_hose; - - /* setting this register will take the V3 out of reset */ - - *(volatile unsigned int *) (INTEGRATOR_SC_PCIENABLE) = 1; - - /* wait a few usecs to settle the device and the PCI bus */ - - for (i = 0; i < 100; i++) - j = i + 1; - - /* Now write the Base I/O Address Word to V3_BASE + 0x6C */ - - *(volatile unsigned short *) (V3_BASE + V3_LB_IO_BASE) = - (unsigned short) (V3_BASE >> 16); - - do { - *(volatile unsigned char *) (V3_BASE + V3_MAIL_DATA) = 0xAA; - *(volatile unsigned char *) (V3_BASE + V3_MAIL_DATA + 4) = - 0x55; - } while (*(volatile unsigned char *) (V3_BASE + V3_MAIL_DATA) != 0xAA - || *(volatile unsigned char *) (V3_BASE + V3_MAIL_DATA + - 4) != 0x55); - - /* Make sure that V3 register access is not locked, if it is, unlock it */ - - if ((*(volatile unsigned short *) (V3_BASE + V3_SYSTEM) & - V3_SYSTEM_M_LOCK) - == V3_SYSTEM_M_LOCK) - *(volatile unsigned short *) (V3_BASE + V3_SYSTEM) = 0xA05F; - - /* Ensure that the slave accesses from PCI are disabled while we */ - /* setup windows */ - - *(volatile unsigned short *) (V3_BASE + V3_PCI_CMD) &= - ~(V3_COMMAND_M_MEM_EN | V3_COMMAND_M_IO_EN); - - /* Clear RST_OUT to 0; keep the PCI bus in reset until we've finished */ - - *(volatile unsigned short *) (V3_BASE + V3_SYSTEM) &= - ~V3_SYSTEM_M_RST_OUT; - - /* Make all accesses from PCI space retry until we're ready for them */ - - *(volatile unsigned short *) (V3_BASE + V3_PCI_CFG) |= - V3_PCI_CFG_M_RETRY_EN; - - /* Set up any V3 PCI Configuration Registers that we absolutely have to */ - /* LB_CFG controls Local Bus protocol. */ - /* Enable LocalBus byte strobes for READ accesses too. */ - /* set bit 7 BE_IMODE and bit 6 BE_OMODE */ - - *(volatile unsigned short *) (V3_BASE + V3_LB_CFG) |= 0x0C0; - - /* PCI_CMD controls overall PCI operation. */ - /* Enable PCI bus master. */ - - *(volatile unsigned short *) (V3_BASE + V3_PCI_CMD) |= 0x04; - - /* PCI_MAP0 controls where the PCI to CPU memory window is on Local Bus */ - - *(volatile unsigned int *) (V3_BASE + V3_PCI_MAP0) = - (INTEGRATOR_BOOT_ROM_BASE) | (V3_PCI_MAP_M_ADR_SIZE_512M | - V3_PCI_MAP_M_REG_EN | - V3_PCI_MAP_M_ENABLE); - - /* PCI_BASE0 is the PCI address of the start of the window */ - - *(volatile unsigned int *) (V3_BASE + V3_PCI_BASE0) = - INTEGRATOR_BOOT_ROM_BASE; - - /* PCI_MAP1 is LOCAL address of the start of the window */ - - *(volatile unsigned int *) (V3_BASE + V3_PCI_MAP1) = - (INTEGRATOR_HDR0_SDRAM_BASE) | (V3_PCI_MAP_M_ADR_SIZE_1024M | - V3_PCI_MAP_M_REG_EN | - V3_PCI_MAP_M_ENABLE); - - /* PCI_BASE1 is the PCI address of the start of the window */ - - *(volatile unsigned int *) (V3_BASE + V3_PCI_BASE1) = - INTEGRATOR_HDR0_SDRAM_BASE; - - /* Set up the windows from local bus memory into PCI configuration, */ - /* I/O and Memory. */ - /* PCI I/O, LB_BASE2 and LB_MAP2 are used exclusively for this. */ - - *(volatile unsigned short *) (V3_BASE + V3_LB_BASE2) = - ((CPU_PCI_IO_ADRS >> 24) << 8) | V3_LB_BASE_M_ENABLE; - *(volatile unsigned short *) (V3_BASE + V3_LB_MAP2) = 0; - - /* PCI Configuration, use LB_BASE1/LB_MAP1. */ - - /* PCI Memory use LB_BASE0/LB_MAP0 and LB_BASE1/LB_MAP1 */ - /* Map first 256Mbytes as non-prefetchable via BASE0/MAP0 */ - /* (INTEGRATOR_PCI_BASE == PCI_MEM_BASE) */ - - *(volatile unsigned int *) (V3_BASE + V3_LB_BASE0) = - INTEGRATOR_PCI_BASE | (0x80 | V3_LB_BASE_M_ENABLE); - - *(volatile unsigned short *) (V3_BASE + V3_LB_MAP0) = - ((INTEGRATOR_PCI_BASE >> 20) << 0x4) | 0x0006; - - /* Map second 256 Mbytes as prefetchable via BASE1/MAP1 */ - - *(volatile unsigned int *) (V3_BASE + V3_LB_BASE1) = - INTEGRATOR_PCI_BASE | (0x84 | V3_LB_BASE_M_ENABLE); - - *(volatile unsigned short *) (V3_BASE + V3_LB_MAP1) = - (((INTEGRATOR_PCI_BASE + 0x10000000) >> 20) << 4) | 0x0006; - - /* Allow accesses to PCI Configuration space */ - /* and set up A1, A0 for type 1 config cycles */ - - *(volatile unsigned short *) (V3_BASE + V3_PCI_CFG) = - ((*(volatile unsigned short *) (V3_BASE + V3_PCI_CFG)) & - ~(V3_PCI_CFG_M_RETRY_EN | V3_PCI_CFG_M_AD_LOW1)) | - V3_PCI_CFG_M_AD_LOW0; - - /* now we can allow in PCI MEMORY accesses */ - - *(volatile unsigned short *) (V3_BASE + V3_PCI_CMD) = - (*(volatile unsigned short *) (V3_BASE + V3_PCI_CMD)) | - V3_COMMAND_M_MEM_EN; - - /* Set RST_OUT to take the PCI bus is out of reset, PCI devices can */ - /* initialise and lock the V3 system register so that no one else */ - /* can play with it */ - - *(volatile unsigned short *) (V3_BASE + V3_SYSTEM) = - (*(volatile unsigned short *) (V3_BASE + V3_SYSTEM)) | - V3_SYSTEM_M_RST_OUT; - - *(volatile unsigned short *) (V3_BASE + V3_SYSTEM) = - (*(volatile unsigned short *) (V3_BASE + V3_SYSTEM)) | - V3_SYSTEM_M_LOCK; - - /* - * Register the hose - */ - hose->first_busno = 0; - hose->last_busno = 0xff; - - /* System memory space */ - pci_set_region (hose->regions + 0, - 0x00000000, 0x40000000, 0x01000000, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - /* PCI Memory - config space */ - pci_set_region (hose->regions + 1, - 0x00000000, 0x62000000, 0x01000000, PCI_REGION_MEM); - - /* PCI V3 regs */ - pci_set_region (hose->regions + 2, - 0x00000000, 0x61000000, 0x00080000, PCI_REGION_MEM); - - /* PCI I/O space */ - pci_set_region (hose->regions + 3, - 0x00000000, 0x60000000, 0x00010000, PCI_REGION_IO); - - pci_set_ops (hose, - pci_integrator_read_byte, - pci_integrator_read__word, - pci_integrator_read_dword, - pci_integrator_write_byte, - pci_integrator_write_word, pci_integrator_write_dword); - - hose->region_count = 4; - - pci_register_hose (hose); - - pciauto_config_init (hose); - pciauto_config_device (hose, 0); - - hose->last_busno = pci_hose_scan (hose); -} diff --git a/board/armltd/integrator/split_by_variant.sh b/board/armltd/integrator/split_by_variant.sh deleted file mode 100755 index 19fc832..0000000 --- a/board/armltd/integrator/split_by_variant.sh +++ /dev/null @@ -1,220 +0,0 @@ -#!/bin/sh - -mkdir -p ${obj}include -mkdir -p ${obj}board/armltd/integrator - -config_file=${obj}include/config.h - -if [ "$1" = "ap" ] -then -# --------------------------------------------------------- -# Set the platform defines -# --------------------------------------------------------- -cat > ${config_file} << _EOF -/* Integrator configuration implied by Makefile target */ -#define CONFIG_INTEGRATOR /* Integrator board */ -#define CONFIG_ARCH_INTEGRATOR 1 /* Integrator/AP */ -_EOF - -# --------------------------------------------------------- -# Set the core module defines according to Core Module -# --------------------------------------------------------- -cpu="arm_intcm" -variant="unknown core module" - -if [ "$2" = "" ] -then - echo "$0:: No parameters - using arm_intcm" -else - case "$2" in - ap7_config) - cpu="arm_intcm" - variant="unported core module CM7TDMI" - ;; - - ap966) - cpu="arm_intcm" - variant="unported core module CM966E-S" - ;; - - ap922_config) - cpu="arm_intcm" - variant="unported core module CM922T" - ;; - - integratorap_config | \ - ap_config) - cpu="arm_intcm" - variant="unspecified core module" - ;; - - ap720t_config) - cpu="arm720t" - echo "#define CONFIG_CM720T 1 /* CPU core is ARM720T */" \ - >> ${config_file} - variant="Core module CM720T" - ;; - - ap922_XA10_config) - cpu="arm_intcm" - variant="unported core module CM922T_XA10" - echo "#define CONFIG_CM922T_XA10 1 /* CPU core is ARM922T_XA10 */" \ - >> ${config_file} - ;; - - ap920t_config) - cpu="arm920t" - variant="Core module CM920T" - echo "#define CONFIG_CM920T 1 /* CPU core is ARM920T */" \ - >> ${config_file} - ;; - - ap926ejs_config) - cpu="arm926ejs" - variant="Core module CM926EJ-S" - echo "#define CONFIG_CM926EJ_S 1 /* CPU core is ARM926EJ-S */" \ - >> ${config_file} - ;; - - ap946es_config) - cpu="arm946es" - variant="Core module CM946E-S" - echo "#define CONFIG_CM946E_S 1 /* CPU core is ARM946E-S */" \ - >> ${config_file} - ;; - - *) - echo "$0:: Unknown core module" - variant="unknown core module" - cpu="arm_intcm" - ;; - - esac -fi - -case "$cpu" in - arm_intcm) - cat >> ${config_file} << _EOF -/* Core module undefined/not ported */ -#define CONFIG_ARM_INTCM 1 -#undef CONFIG_CM_MULTIPLE_SSRAM /* CM may not have multiple SSRAM mapping */ -#undef CONFIG_CM_SPD_DETECT /* CM may not support SPD query */ -#undef CONFIG_CM_REMAP /* CM may not support remapping */ -#undef CONFIG_CM_INIT /* CM may not have initialization reg */ -#undef CONFIG_CM_TCRAM /* CM may not have TCRAM */ -/* May not be processor without cache support */ -#define CONFIG_SYS_ICACHE_OFF 1 -#define CONFIG_SYS_DCACHE_OFF 1 -_EOF - ;; - - arm720t) - cat >> ${config_file} << _EOF -/* May not be processor without cache support */ -#define CONFIG_SYS_ICACHE_OFF 1 -#define CONFIG_SYS_DCACHE_OFF 1 -_EOF - ;; -esac - -else - -# --------------------------------------------------------- -# Set the platform defines -# --------------------------------------------------------- -cat >> ${config_file} << _EOF -/* Integrator configuration implied by Makefile target */ -#define CONFIG_INTEGRATOR /* Integrator board */ -#define CONFIG_ARCH_CINTEGRATOR 1 /* Integrator/CP */ -_EOF - -cpu="arm_intcm" -variant="unknown core module" - -if [ "$2" = "" ] -then - echo "$0:: No parameters - using arm_intcm" -else - case "$2" in - ap966) - cpu="arm_intcm" - variant="unported core module CM966E-S" - ;; - - ap922_config) - cpu="arm_intcm" - variant="unported core module CM922T" - ;; - - integratorcp_config | \ - cp_config) - cpu="arm_intcm" - variant="unspecified core module" - ;; - - cp922_XA10_config) - cpu="arm_intcm" - variant="unported core module CM922T_XA10" - echo "#define CONFIG_CM922T_XA10 1 /* CPU core is ARM922T_XA10 */" \ - >> ${config_file} - ;; - - cp920t_config) - cpu="arm920t" - variant="Core module CM920T" - echo "#define CONFIG_CM920T 1 /* CPU core is ARM920T */" \ - >> ${config_file} - ;; - - cp926ejs_config) - cpu="arm926ejs" - variant="Core module CM926EJ-S" - echo "#define CONFIG_CM926EJ_S 1 /* CPU core is ARM926EJ-S */" \ - >> ${config_file} - ;; - - - cp946es_config) - cpu="arm946es" - variant="Core module CM946E-S" - echo "#define CONFIG_CM946E_S 1 /* CPU core is ARM946E-S */" \ - >> ${config_file} - ;; - - cp1136_config) - cpu="arm1136" - variant="Core module CM1136EJF-S" - echo "#define CONFIG_CM1136EJF_S 1 /* CPU core is ARM1136JF-S */" \ - >> ${config_file} - ;; - - *) - echo "$0:: Unknown core module" - variant="unknown core module" - cpu="arm_intcm" - ;; - - esac - -fi - -if [ "$cpu" = "arm_intcm" ] -then - cat >> ${config_file} << _EOF -/* Core module undefined/not ported */ -#define CONFIG_ARM_INTCM 1 -#undef CONFIG_CM_MULTIPLE_SSRAM /* CM may not have multiple SSRAM mapping */ -#undef CONFIG_CM_SPD_DETECT /* CM may not support SPD query */ -#undef CONFIG_CM_REMAP /* CM may not support remapping */ -#undef CONFIG_CM_INIT /* CM may not have initialization reg */ -#undef CONFIG_CM_TCRAM /* CM may not have TCRAM */ -_EOF -fi - -fi # ap - -# --------------------------------------------------------- -# Complete the configuration -# --------------------------------------------------------- -$MKCONFIG -a -n "${2%%_config}" integrator$1 arm $cpu integrator armltd -echo "Variant: $variant with core $cpu" diff --git a/board/armltd/integrator/timer.c b/board/armltd/integrator/timer.c deleted file mode 100644 index 7562ffa..0000000 --- a/board/armltd/integrator/timer.c +++ /dev/null @@ -1,200 +0,0 @@ -/* - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH - * Marius Groeger - * - * (C) Copyright 2002 - * David Mueller, ELSOFT AG, - * - * (C) Copyright 2003 - * Texas Instruments, - * Kshitij Gupta - * - * (C) Copyright 2004 - * ARM Ltd. - * Philippe Robin, - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include - -#ifdef CONFIG_ARCH_CINTEGRATOR -#define DIV_CLOCK_INIT 1 -#define TIMER_LOAD_VAL 0xFFFFFFFFL -#else -#define DIV_CLOCK_INIT 256 -#define TIMER_LOAD_VAL 0x0000FFFFL -#endif -/* The Integrator/CP timer1 is clocked at 1MHz - * can be divided by 16 or 256 - * and can be set up as a 32-bit timer - */ -/* U-Boot expects a 32 bit timer, running at CONFIG_SYS_HZ */ -/* Keep total timer count to avoid losing decrements < div_timer */ -static unsigned long long total_count = 0; -static unsigned long long lastdec; /* Timer reading at last call */ -/* Divisor applied to timer clock */ -static unsigned long long div_clock = DIV_CLOCK_INIT; -static unsigned long long div_timer = 1; /* Divisor to convert timer reading - * change to U-Boot ticks - */ -/* CONFIG_SYS_HZ = CONFIG_SYS_HZ_CLOCK/(div_clock * div_timer) */ -static ulong timestamp; /* U-Boot ticks since startup */ - -#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4)) - -/* all function return values in U-Boot ticks i.e. (1/CONFIG_SYS_HZ) sec - * - unless otherwise stated - */ - -/* starts up a counter - * - the Integrator/CP timer can be set up to issue an interrupt */ -int timer_init (void) -{ - /* Load timer with initial value */ - *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL; -#ifdef CONFIG_ARCH_CINTEGRATOR - /* Set timer to be - * enabled 1 - * periodic 1 - * no interrupts 0 - * X 0 - * divider 1 00 == less rounding error - * 32 bit 1 - * wrapping 0 - */ - *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x000000C2; -#else - /* Set timer to be - * enabled 1 - * free-running 0 - * XX 00 - * divider 256 10 - * XX 00 - */ - *(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x00000088; -#endif - - /* init the timestamp */ - total_count = 0ULL; - reset_timer_masked(); - - div_timer = CONFIG_SYS_HZ_CLOCK; - do_div(div_timer, CONFIG_SYS_HZ); - do_div(div_timer, div_clock); - - return (0); -} - -/* - * timer without interrupts - */ -void reset_timer (void) -{ - reset_timer_masked (); -} - -ulong get_timer (ulong base_ticks) -{ - return get_timer_masked () - base_ticks; -} - -void set_timer (ulong ticks) -{ - timestamp = ticks; - total_count = ticks * div_timer; -} - -/* delay usec useconds */ -void __udelay (unsigned long usec) -{ - ulong tmo, tmp; - - /* Convert to U-Boot ticks */ - tmo = usec * CONFIG_SYS_HZ; - tmo /= (1000000L); - - tmp = get_timer_masked(); /* get current timestamp */ - tmo += tmp; /* form target timestamp */ - - while (get_timer_masked () < tmo) {/* loop till event */ - /*NOP*/; - } -} - -void reset_timer_masked (void) -{ - /* capure current decrementer value */ - lastdec = READ_TIMER; - /* start "advancing" time stamp from 0 */ - timestamp = 0L; -} - -/* converts the timer reading to U-Boot ticks */ -/* the timestamp is the number of ticks since reset */ -ulong get_timer_masked (void) -{ - /* get current count */ - unsigned long long now = READ_TIMER; - - if(now > lastdec) { - /* Must have wrapped */ - total_count += lastdec + TIMER_LOAD_VAL + 1 - now; - } else { - total_count += lastdec - now; - } - lastdec = now; - - /* Reuse "now" */ - now = total_count; - do_div(now, div_timer); - timestamp = now; - - return timestamp; -} - -/* waits specified delay value and resets timestamp */ -void udelay_masked (unsigned long usec) -{ - udelay(usec); -} - -/* - * This function is derived from PowerPC code (read timebase as long long). - * On ARM it just returns the timer value. - */ -unsigned long long get_ticks(void) -{ - return get_timer(0); -} - -/* - * Return the timebase clock frequency - * i.e. how often the timer decrements - */ -ulong get_tbclk (void) -{ - unsigned long long tmp = CONFIG_SYS_HZ_CLOCK; - - do_div(tmp, div_clock); - - return tmp; -} diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 792e122..d660814 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,6 +11,7 @@ easily if here is something they might want to dig for... Board Arch CPU removed Commit last known maintainer/contact ============================================================================= +integratorcp arm ? - 2011-07-17 Peter Pearse voiceblue arm arm925t - 2011-07-17 versatile arm ARM926EJS - 2011-07-17 Peter Pearse spear300 arm ARM926EJS - 2011-07-17 Vipin Kumar diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h deleted file mode 100644 index 32ff193..0000000 --- a/include/configs/integratorap.h +++ /dev/null @@ -1,289 +0,0 @@ -/* - * (C) Copyright 2003 - * Texas Instruments. - * Kshitij Gupta - * Configuation settings for the TI OMAP Innovator board. - * - * (C) Copyright 2004 - * ARM Ltd. - * Philippe Robin, - * Configuration for Integrator AP board. - *. - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SYS_MEMTEST_START 0x100000 -#define CONFIG_SYS_MEMTEST_END 0x10000000 -#define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_HZ_CLOCK 24000000 /* Timer 1 is clocked at 24Mhz */ -#define CONFIG_SYS_TIMERBASE 0x13000100 /* Timer1 */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */ - -#define CONFIG_SKIP_LOWLEVEL_INIT -#define CONFIG_CM_INIT 1 -#define CONFIG_CM_REMAP 1 -#undef CONFIG_CM_SPD_DETECT - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * PL010 Configuration - */ -#define CONFIG_PL010_SERIAL -#define CONFIG_CONS_INDEX 0 -#define CONFIG_BAUDRATE 38400 -#define CONFIG_PL01x_PORTS { (void *) (CONFIG_SYS_SERIAL0), (void *) (CONFIG_SYS_SERIAL1) } -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_SYS_SERIAL0 0x16000000 -#define CONFIG_SYS_SERIAL1 0x17000000 - -/*#define CONFIG_NET_MULTI */ - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ - -#define CONFIG_CMD_IMI -#define CONFIG_CMD_BDI -#define CONFIG_CMD_MEMORY - - -#define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTARGS "root=/dev/mtdblock0 mem=32M console=ttyAM0 console=tty" -#define CONFIG_BOOTCOMMAND "" - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "Integrator-AP # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ - -#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */ - -#define CONFIG_SYS_FLASH_BASE 0x24000000 - -/*----------------------------------------------------------------------- - * FLASH and environment organization - */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_ENV_IS_NOWHERE -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ -#define CONFIG_SYS_MAX_FLASH_SECT 128 -#define CONFIG_ENV_SIZE 32768 - - -/*----------------------------------------------------------------------- - * PCI definitions - */ - -#ifdef CONFIG_PCI /* pci support */ -#undef CONFIG_PCI_PNP -#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */ -#define DEBUG - -#define CONFIG_EEPRO100 -#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */ - -#define INTEGRATOR_BOOT_ROM_BASE 0x20000000 -#define INTEGRATOR_HDR0_SDRAM_BASE 0x80000000 - -/* PCI Base area */ -#define INTEGRATOR_PCI_BASE 0x40000000 -#define INTEGRATOR_PCI_SIZE 0x3FFFFFFF - -/* memory map as seen by the CPU on the local bus */ -#define CPU_PCI_IO_ADRS 0x60000000 /* PCI I/O space base */ -#define CPU_PCI_IO_SIZE 0x10000 - -#define CPU_PCI_CNFG_ADRS 0x61000000 /* PCI config space */ -#define CPU_PCI_CNFG_SIZE 0x1000000 - -#define PCI_MEM_BASE 0x40000000 /* 512M to xxx */ -/* unused 256M from A0000000-AFFFFFFF might be used for I2O ??? */ -#define INTEGRATOR_PCI_IO_BASE 0x60000000 /* 16M to xxx */ -/* unused (128-16)M from B1000000-B7FFFFFF */ -#define PCI_CONFIG_BASE 0x61000000 /* 16M to xxx */ -/* unused ((128-16)M - 64K) from XXX */ - -#define PCI_V3_BASE 0x62000000 - -/* V3 PCI bridge controller */ -#define V3_BASE 0x62000000 /* V360EPC registers */ - -#define PCI_ENET0_IOADDR (CPU_PCI_IO_ADRS) -#define PCI_ENET0_MEMADDR (PCI_MEM_BASE) - - -#define V3_PCI_VENDOR 0x00000000 -#define V3_PCI_DEVICE 0x00000002 -#define V3_PCI_CMD 0x00000004 -#define V3_PCI_STAT 0x00000006 -#define V3_PCI_CC_REV 0x00000008 -#define V3_PCI_HDR_CF 0x0000000C -#define V3_PCI_IO_BASE 0x00000010 -#define V3_PCI_BASE0 0x00000014 -#define V3_PCI_BASE1 0x00000018 -#define V3_PCI_SUB_VENDOR 0x0000002C -#define V3_PCI_SUB_ID 0x0000002E -#define V3_PCI_ROM 0x00000030 -#define V3_PCI_BPARAM 0x0000003C -#define V3_PCI_MAP0 0x00000040 -#define V3_PCI_MAP1 0x00000044 -#define V3_PCI_INT_STAT 0x00000048 -#define V3_PCI_INT_CFG 0x0000004C -#define V3_LB_BASE0 0x00000054 -#define V3_LB_BASE1 0x00000058 -#define V3_LB_MAP0 0x0000005E -#define V3_LB_MAP1 0x00000062 -#define V3_LB_BASE2 0x00000064 -#define V3_LB_MAP2 0x00000066 -#define V3_LB_SIZE 0x00000068 -#define V3_LB_IO_BASE 0x0000006E -#define V3_FIFO_CFG 0x00000070 -#define V3_FIFO_PRIORITY 0x00000072 -#define V3_FIFO_STAT 0x00000074 -#define V3_LB_ISTAT 0x00000076 -#define V3_LB_IMASK 0x00000077 -#define V3_SYSTEM 0x00000078 -#define V3_LB_CFG 0x0000007A -#define V3_PCI_CFG 0x0000007C -#define V3_DMA_PCI_ADR0 0x00000080 -#define V3_DMA_PCI_ADR1 0x00000090 -#define V3_DMA_LOCAL_ADR0 0x00000084 -#define V3_DMA_LOCAL_ADR1 0x00000094 -#define V3_DMA_LENGTH0 0x00000088 -#define V3_DMA_LENGTH1 0x00000098 -#define V3_DMA_CSR0 0x0000008B -#define V3_DMA_CSR1 0x0000009B -#define V3_DMA_CTLB_ADR0 0x0000008C -#define V3_DMA_CTLB_ADR1 0x0000009C -#define V3_DMA_DELAY 0x000000E0 -#define V3_MAIL_DATA 0x000000C0 -#define V3_PCI_MAIL_IEWR 0x000000D0 -#define V3_PCI_MAIL_IERD 0x000000D2 -#define V3_LB_MAIL_IEWR 0x000000D4 -#define V3_LB_MAIL_IERD 0x000000D6 -#define V3_MAIL_WR_STAT 0x000000D8 -#define V3_MAIL_RD_STAT 0x000000DA -#define V3_QBA_MAP 0x000000DC - -/* SYSTEM register bits */ -#define V3_SYSTEM_M_RST_OUT (1 << 15) -#define V3_SYSTEM_M_LOCK (1 << 14) - -/* PCI_CFG bits */ -#define V3_PCI_CFG_M_RETRY_EN (1 << 10) -#define V3_PCI_CFG_M_AD_LOW1 (1 << 9) -#define V3_PCI_CFG_M_AD_LOW0 (1 << 8) - -/* PCI MAP register bits (PCI -> Local bus) */ -#define V3_PCI_MAP_M_MAP_ADR 0xFFF00000 -#define V3_PCI_MAP_M_RD_POST_INH (1 << 15) -#define V3_PCI_MAP_M_ROM_SIZE (1 << 11 | 1 << 10) -#define V3_PCI_MAP_M_SWAP (1 << 9 | 1 << 8) -#define V3_PCI_MAP_M_ADR_SIZE 0x000000F0 -#define V3_PCI_MAP_M_REG_EN (1 << 1) -#define V3_PCI_MAP_M_ENABLE (1 << 0) - -/* 9 => 512M window size */ -#define V3_PCI_MAP_M_ADR_SIZE_512M 0x00000090 - -/* A => 1024M window size */ -#define V3_PCI_MAP_M_ADR_SIZE_1024M 0x000000A0 - -/* LB_BASE register bits (Local bus -> PCI) */ -#define V3_LB_BASE_M_MAP_ADR 0xFFF00000 -#define V3_LB_BASE_M_SWAP (1 << 8 | 1 << 9) -#define V3_LB_BASE_M_ADR_SIZE 0x000000F0 -#define V3_LB_BASE_M_PREFETCH (1 << 3) -#define V3_LB_BASE_M_ENABLE (1 << 0) - -/* PCI COMMAND REGISTER bits */ -#define V3_COMMAND_M_FBB_EN (1 << 9) -#define V3_COMMAND_M_SERR_EN (1 << 8) -#define V3_COMMAND_M_PAR_EN (1 << 6) -#define V3_COMMAND_M_MASTER_EN (1 << 2) -#define V3_COMMAND_M_MEM_EN (1 << 1) -#define V3_COMMAND_M_IO_EN (1 << 0) - -#define INTEGRATOR_SC_BASE 0x11000000 -#define INTEGRATOR_SC_PCIENABLE_OFFSET 0x18 -#define INTEGRATOR_SC_PCIENABLE \ - (INTEGRATOR_SC_BASE + INTEGRATOR_SC_PCIENABLE_OFFSET) - -#endif /* CONFIG_PCI */ -/*----------------------------------------------------------------------- - * There are various dependencies on the core module (CM) fitted - * Users should refer to their CM user guide - * - when porting adjust u-boot/Makefile accordingly - * to define the necessary CONFIG_ s for the CM involved - * see e.g. integratorcp_CM926EJ-S_config - */ -#include "armcoremodule.h" - -#endif /* __CONFIG_H */ diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h deleted file mode 100644 index 2c8ca2d..0000000 --- a/include/configs/integratorcp.h +++ /dev/null @@ -1,255 +0,0 @@ -/* - * (C) Copyright 2003 - * Texas Instruments. - * Kshitij Gupta - * Configuation settings for the TI OMAP Innovator board. - * - * (C) Copyright 2004 - * ARM Ltd. - * Philippe Robin, - * Configuration for Compact Integrator board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SYS_MEMTEST_START 0x100000 -#define CONFIG_SYS_MEMTEST_END 0x10000000 -#define CONFIG_SYS_HZ 1000 -#define CONFIG_SYS_HZ_CLOCK 1000000 /* Timer 1 is clocked at 1Mhz */ -#define CONFIG_SYS_TIMERBASE 0x13000100 - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_MISC_INIT_R 1 /* call misc_init_r during start up */ -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) - -/* - * Hardware drivers - */ -#define CONFIG_NET_MULTI -#define CONFIG_SMC91111 -#define CONFIG_SMC_USE_32_BIT -#define CONFIG_SMC91111_BASE 0xC8000000 -#undef CONFIG_SMC91111_EXT_PHY - -/* - * NS16550 Configuration - */ -#define CONFIG_PL011_SERIAL -#define CONFIG_PL011_CLOCK 14745600 -#define CONFIG_PL01x_PORTS { (void *)CONFIG_SYS_SERIAL0, (void *)CONFIG_SYS_SERIAL1 } -#define CONFIG_CONS_INDEX 0 -#define CONFIG_BAUDRATE 38400 -#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } -#define CONFIG_SYS_SERIAL0 0x16000000 -#define CONFIG_SYS_SERIAL1 0x17000000 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#define CONFIG_CMD_BDI -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_SAVEENV -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_IMI -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_NET -#define CONFIG_CMD_PING - - -#if 0 -#define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTARGS "root=/dev/nfs nfsroot=:/ mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0" -#define CONFIG_BOOTCOMMAND "bootp ; bootm" -#endif -/* The kernel command line & boot command below are for a platform flashed with afu.axf - -Image 666 Block 0 End Block 0 address 0x24000000 exec 0x24000000- name u-boot -Image 667 Block 1 End Block 13 address 0x24040000 exec 0x24040000- name u-linux -Image 668 Block 14 End Block 33 address 0x24380000 exec 0x24380000- name rootfs -SIB at Block62 End Block62 address 0x24f80000 - -*/ -#define CONFIG_BOOTDELAY 2 -#define CONFIG_BOOTARGS "root=/dev/mtdblock2 mem=128M ip=dhcp netdev=27,0,0xfc800000,0xfc800010,eth0 video=clcdfb:0 console=ttyAMA0" -#define CONFIG_BOOTCOMMAND "cp 0x24080000 0x7fc0 0x100000; bootm" - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP /* undef to save memory */ -#define CONFIG_SYS_PROMPT "Integrator-CP # " /* Monitor Command Prompt */ -#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size*/ -/* Print Buffer Size */ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) -#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ -#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size*/ - -#define CONFIG_SYS_LOAD_ADDR 0x7fc0 /* default load address */ - -/*----------------------------------------------------------------------- - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE (128*1024) /* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */ -#endif - -/*----------------------------------------------------------------------- - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ -#define PHYS_SDRAM_1 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ - -/*----------------------------------------------------------------------- - * FLASH and environment organization - - * Top varies according to amount fitted - * Reserve top 4 blocks of flash - * - ARM Boot Monitor - * - Unused - * - SIB block - * - U-Boot environment - * - * Base is always 0x24000000 - - */ -#define CONFIG_SYS_FLASH_BASE 0x24000000 -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define CONFIG_SYS_MAX_FLASH_SECT 64 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ -#define PHYS_FLASH_SIZE 0x01000000 /* 16MB */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* Timeout for Flash Write */ - -#define CONFIG_SYS_MONITOR_LEN 0x00100000 -#define CONFIG_ENV_IS_IN_FLASH 1 - -/* - * Move up the U-Boot & monitor area if more flash is fitted. - * If this U-Boot is to be run on Integrators with varying flash sizes, - * drivers/mtd/cfi_flash.c::flash_init() can read the Integrator CP_FLASHPROG - * register and dynamically assign CONFIG_ENV_ADDR & CONFIG_SYS_MONITOR_BASE - * - CONFIG_SYS_MONITOR_BASE is set to indicate that the environment is not - * embedded in the boot monitor(s) area - */ -#if ( PHYS_FLASH_SIZE == 0x04000000 ) - -#define CONFIG_ENV_ADDR 0x27F00000 -#define CONFIG_SYS_MONITOR_BASE 0x27F40000 - -#elif (PHYS_FLASH_SIZE == 0x02000000 ) - -#define CONFIG_ENV_ADDR 0x25F00000 -#define CONFIG_SYS_MONITOR_BASE 0x25F40000 - -#else - -#define CONFIG_ENV_ADDR 0x24F00000 -#define CONFIG_SYS_MONITOR_BASE 0x27F40000 - -#endif - -#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */ -#define CONFIG_ENV_SIZE 8192 /* 8KB */ -/*----------------------------------------------------------------------- - * CP control registers - */ -#define CPCR_BASE 0xCB000000 /* CP Registers*/ -#define OS_FLASHPROG 0x00000004 /* Flash register*/ -#define CPMASK_EXTRABANK 0x8 -#define CPMASK_FLASHSIZE 0x4 -#define CPMASK_FLWREN 0x2 -#define CPMASK_FLVPPEN 0x1 - -/* - * The ARM boot monitor initializes the board. - * However, the default U-Boot code also performs the initialization. - * If desired, this can be prevented by defining SKIP_LOWLEVEL_INIT - * - see documentation supplied with board for details of how to choose the - * image to run at reset/power up - * e.g. whether the ARM Boot Monitor runs before U-Boot - -#define CONFIG_SKIP_LOWLEVEL_INIT - - */ - -/* - * The ARM boot monitor does not relocate U-Boot. - * However, the default U-Boot code performs the relocation check, - * and may relocate the code if the memory map is changed. - * If necessary this can be prevented by defining SKIP_RELOCATE_UBOOT - -#define SKIP_CONFIG_RELOCATE_UBOOT - - */ -/*----------------------------------------------------------------------- - * There are various dependencies on the core module (CM) fitted - * Users should refer to their CM user guide - * - when porting adjust u-boot/Makefile accordingly - * to define the necessary CONFIG_ s for the CM involved - * see e.g. cp_926ejs_config - */ - -#include "armcoremodule.h" - -/* - * If CONFIG_SKIP_LOWLEVEL_INIT is not defined & - * the core module has a CM_INIT register - * then the U-Boot initialisation code will - * e.g. ARM Boot Monitor or pre-loader is repeated once - * (to re-initialise any existing CM_INIT settings to safe values). - * - * This is usually not the desired behaviour since the platform - * will either reboot into the ARM monitor (or pre-loader) - * or continuously cycle thru it without U-Boot running, - * depending upon the setting of Integrator/CP switch S2-4. - * - * However it may be needed if Integrator/CP switch S2-1 - * is set OFF to boot direct into U-Boot. - * In that case comment out the line below. -#undef CONFIG_CM_INIT - */ - -#endif /* __CONFIG_H */